On 2020/6/29 6:51, Alistair Francis wrote:
On Sun, Jun 28, 2020 at 7:30 AM Peter Maydell <peter.mayd...@linaro.org> wrote:
On Fri, 26 Jun 2020 at 22:53, Alistair Francis <alistair.fran...@wdc.com> wrote:
The following changes since commit 553cf5d7c47bee05a3dec9461c1f8430316d516b:
Merge remote-tracking branch
'remotes/pmaydell/tags/pull-target-arm-20200626' into staging (2020-06-26
18:22:36 +0100)
are available in the Git repository at:
g...@github.com:alistair23/qemu.git tags/pull-riscv-to-apply-20200626-1
for you to fetch changes up to b39d59434ea10649fdb9e0a339c30c76e38c5e17:
target/riscv: configure and turn on vector extension from command line
(2020-06-26 14:22:15 -0700)
----------------------------------------------------------------
This PR contains two patches to improve PLIC support in QEMU.
The rest of the PR is adding support for the v0.7.1 RISC-V vector
extensions. This is experimental support as the vector extensions are
still in a draft state.
Hi; I'm afraid this fails to build on PPC64 and s390x (ie
our big-endian hosts):
Hi Peter,
Do you mean you built the patch set on PPC64 or s390x and got errors in
the list? Or just a worry?
I have built the patch set on Ubuntu 18.04 X86-64. I don't know which
compile option
will fails the compilation. If you compiled on Ubuntu x86-64, could you
show me the
compile option?
As a note: I try to find a PPC64 for test, but I'm afraid it will be too
later.
Is there an available PPC64 machine in the community?
Thanks very much.
Zhiwei
LIU Zhiwei do you mind looking into this?
Alistair
/home/ubuntu/qemu/target/riscv/vector_helper.c: In function ‘vext_clear’:
/home/ubuntu/qemu/target/riscv/vector_helper.c: In function ‘vext_clear’:
/home/ubuntu/qemu/target/riscv/vector_helper.c:154:21: error: invalid
operands to binary & (have ‘void *’ and ‘long long unsigned int’)
memset(tail & ~(7ULL), 0, part1);
^
/home/ubuntu/qemu/target/riscv/vector_helper.c:155:27: error: invalid
operands to binary & (have ‘void *’ and ‘long long unsigned int’)
memset((tail + 8) & ~(7ULL), 0, part2);
~~~~~~~~~~ ^
/home/ubuntu/qemu/target/riscv/vector_helper.c:154:21: error: invalid
operands to binary & (have ‘void *’ and ‘long long unsigned int’)
memset(tail & ~(7ULL), 0, part1);
^
/home/ubuntu/qemu/target/riscv/vector_helper.c:155:27: error: invalid
operands to binary & (have ‘void *’ and ‘long long unsigned int’)
memset((tail + 8) & ~(7ULL), 0, part2);
~~~~~~~~~~ ^
/home/ubuntu/qemu/rules.mak:69: recipe for target
'target/riscv/vector_helper.o' failed
thanks
-- PMM
