[RFC v2 01/76] target/riscv: drop vector 0.7.1 support

[frank . chang]

From: Frank Chang <frank.ch...@sifive.com>

Signed-off-by: Frank Chang <frank.ch...@sifive.com>
---
 target/riscv/cpu.c | 24 ++++++------------------
 target/riscv/cpu.h |  2 --
 2 files changed, 6 insertions(+), 20 deletions(-)

diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 228b9bdb5d..2800953e6c 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -106,11 +106,6 @@ static void set_priv_version(CPURISCVState *env, int 
priv_ver)
     env->priv_ver = priv_ver;
 }
 
-static void set_vext_version(CPURISCVState *env, int vext_ver)
-{
-    env->vext_ver = vext_ver;
-}
-
 static void set_feature(CPURISCVState *env, int feature)
 {
     env->features |= (1ULL << feature);
@@ -339,7 +334,6 @@ static void riscv_cpu_realize(DeviceState *dev, Error 
**errp)
     CPURISCVState *env = &cpu->env;
     RISCVCPUClass *mcc = RISCV_CPU_GET_CLASS(dev);
     int priv_version = PRIV_VERSION_1_11_0;
-    int vext_version = VEXT_VERSION_0_07_1;
     target_ulong target_misa = 0;
     Error *local_err = NULL;
 
@@ -363,7 +357,6 @@ static void riscv_cpu_realize(DeviceState *dev, Error 
**errp)
     }
 
     set_priv_version(env, priv_version);
-    set_vext_version(env, vext_version);
 
     if (cpu->cfg.mmu) {
         set_feature(env, RISCV_FEATURE_MMU);
@@ -455,19 +448,14 @@ static void riscv_cpu_realize(DeviceState *dev, Error 
**errp)
                 return;
             }
             if (cpu->cfg.vext_spec) {
-                if (!g_strcmp0(cpu->cfg.vext_spec, "v0.7.1")) {
-                    vext_version = VEXT_VERSION_0_07_1;
-                } else {
-                    error_setg(errp,
-                           "Unsupported vector spec version '%s'",
-                           cpu->cfg.vext_spec);
-                    return;
-                }
+                error_setg(errp,
+                       "Unsupported vector spec version '%s'",
+                       cpu->cfg.vext_spec);
+                return;
             } else {
-                qemu_log("vector verison is not specified, "
-                        "use the default value v0.7.1\n");
+                qemu_log("vector version is not specified\n");
+                return;
             }
-            set_vext_version(env, vext_version);
         }
 
         set_misa(env, RVXLEN | target_misa);
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index eef20ca6e5..6766dcd914 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -79,8 +79,6 @@ enum {
 #define PRIV_VERSION_1_10_0 0x00011000
 #define PRIV_VERSION_1_11_0 0x00011100
 
-#define VEXT_VERSION_0_07_1 0x00000701
-
 #define TRANSLATE_PMP_FAIL 2
 #define TRANSLATE_FAIL 1
 #define TRANSLATE_SUCCESS 0
-- 
2.17.1