Hi Peter,
please pull the following batch of updates for target/xtensa.
The following changes since commit d0ed6a69d399ae193959225cdeaa9382746c91cc:
Update version for v5.1.0 release (2020-08-11 17:07:03 +0100)
are available in the Git repository at:
git://github.com/OSLL/qemu-xtensa.git tags/20200812-xtensa
for you to fetch changes up to f64fa1494d5f92d4e4f0cc6a0ef3c7e3cc12763d:
target/xtensa: import DSP3400 core (2020-08-12 15:56:51 -0700)
----------------------------------------------------------------
target/xtensa updates for 5.2:
- add NMI support;
- add DFPU option implementation;
- update FPU tests to support both FPU2000 and DFPU;
- add example cores with FPU2000 and DFPU.
----------------------------------------------------------------
Max Filippov (24):
target/xtensa: make opcode properties more dynamic
target/xtensa: implement NMI support
softfloat: make NO_SIGNALING_NANS runtime property
softfloat: pass float_status pointer to pickNaN
softfloat: add xtensa specialization for pickNaNMulAdd
target/xtensa: add geometry to xtensa_get_regfile_by_name
target/xtensa: support copying registers up to 64 bits wide
target/xtensa: rename FPU2000 translators and helpers
target/xtensa: move FSR/FCR register accessors
target/xtensa: don't access BR regfile directly
target/xtensa: add DFPU option
target/xtensa: add DFPU registers and opcodes
target/xtensa: implement FPU division and square root
tests/tcg/xtensa: fix test execution on ISS
tests/tcg/xtensa: update test_fp0_arith for DFPU
tests/tcg/xtensa: expand madd tests
tests/tcg/xtensa: update test_fp0_conv for DFPU
tests/tcg/xtensa: update test_fp1 for DFPU
tests/tcg/xtensa: update test_lsc for DFPU
tests/tcg/xtensa: add fp0 div and sqrt tests
tests/tcg/xtensa: test double precision load/store
tests/tcg/xtensa: add DFP0 arithmetic tests
target/xtensa: import de233_fpu core
target/xtensa: import DSP3400 core
fpu/softfloat-specialize.inc.c | 286 +-
fpu/softfloat.c | 2 +-
hw/xtensa/pic_cpu.c | 6 +-
include/fpu/softfloat-helpers.h | 10 +
include/fpu/softfloat-types.h | 8 +-
target/xtensa/Makefile.objs | 2 +
target/xtensa/core-de233_fpu.c | 58 +
target/xtensa/core-de233_fpu/core-isa.h | 727 +
target/xtensa/core-de233_fpu/core-matmap.h | 717 +
target/xtensa/core-de233_fpu/gdb-config.inc.c | 277 +
target/xtensa/core-de233_fpu/xtensa-modules.inc.c | 20758 +++
target/xtensa/core-dsp3400.c | 58 +
target/xtensa/core-dsp3400/core-isa.h | 452 +
target/xtensa/core-dsp3400/core-matmap.h | 312 +
target/xtensa/core-dsp3400/gdb-config.inc.c | 400 +
target/xtensa/core-dsp3400/xtensa-modules.inc.c | 171906 +++++++++++++++++++
target/xtensa/cpu.c | 5 +
target/xtensa/cpu.h | 14 +-
target/xtensa/exc_helper.c | 23 +-
target/xtensa/fpu_helper.c | 342 +-
target/xtensa/helper.c | 4 +-
target/xtensa/helper.h | 58 +-
target/xtensa/overlay_tool.h | 30 +-
target/xtensa/translate.c | 1979 +-
tests/tcg/xtensa/fpu.h | 142 +
tests/tcg/xtensa/macros.inc | 10 +-
tests/tcg/xtensa/test_dfp0_arith.S | 162 +
tests/tcg/xtensa/test_fp0_arith.S | 282 +-
tests/tcg/xtensa/test_fp0_conv.S | 299 +-
tests/tcg/xtensa/test_fp0_div.S | 82 +
tests/tcg/xtensa/test_fp0_sqrt.S | 76 +
tests/tcg/xtensa/test_fp1.S | 62 +-
tests/tcg/xtensa/test_lsc.S | 170 +-
33 files changed, 198888 insertions(+), 831 deletions(-)
create mode 100644 target/xtensa/core-de233_fpu.c
create mode 100644 target/xtensa/core-de233_fpu/core-isa.h
create mode 100644 target/xtensa/core-de233_fpu/core-matmap.h
create mode 100644 target/xtensa/core-de233_fpu/gdb-config.inc.c
create mode 100644 target/xtensa/core-de233_fpu/xtensa-modules.inc.c
create mode 100644 target/xtensa/core-dsp3400.c
create mode 100644 target/xtensa/core-dsp3400/core-isa.h
create mode 100644 target/xtensa/core-dsp3400/core-matmap.h
create mode 100644 target/xtensa/core-dsp3400/gdb-config.inc.c
create mode 100644 target/xtensa/core-dsp3400/xtensa-modules.inc.c
create mode 100644 tests/tcg/xtensa/fpu.h
create mode 100644 tests/tcg/xtensa/test_dfp0_arith.S
create mode 100644 tests/tcg/xtensa/test_fp0_div.S
create mode 100644 tests/tcg/xtensa/test_fp0_sqrt.S
--
Thanks.
-- Max
