On 8/14/20 6:40 PM, Bin Meng wrote:
> From: Bin Meng <bin.m...@windriver.com>
>
> At present the PHY address of the PHY connected to GEM is hard-coded
> to either 23 (BOARD_PHY_ADDRESS) or 0. This might not be the case for
> all boards. Add a new 'phy-addr' property so that board can specify
> the PHY address for each GEM instance.
>
> Signed-off-by: Bin Meng <bin.m...@windriver.com>
> ---
>
> hw/net/cadence_gem.c | 7 +++++--
> include/hw/net/cadence_gem.h | 2 ++
> 2 files changed, 7 insertions(+), 2 deletions(-)
>
> diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
> index a93b5c0..9fa03de 100644
> --- a/hw/net/cadence_gem.c
> +++ b/hw/net/cadence_gem.c
> @@ -1446,7 +1446,8 @@ static uint64_t gem_read(void *opaque, hwaddr offset,
> unsigned size)
> uint32_t phy_addr, reg_num;
>
> phy_addr = (retval & GEM_PHYMNTNC_ADDR) >>
> GEM_PHYMNTNC_ADDR_SHFT;
> - if (phy_addr == BOARD_PHY_ADDRESS || phy_addr == 0) {
> + if (phy_addr == BOARD_PHY_ADDRESS || phy_addr == 0 ||
> + phy_addr == s->phy_addr) {
> reg_num = (retval & GEM_PHYMNTNC_REG) >>
> GEM_PHYMNTNC_REG_SHIFT;
> retval &= 0xFFFF0000;
> retval |= gem_phy_read(s, reg_num);
> @@ -1569,7 +1570,8 @@ static void gem_write(void *opaque, hwaddr offset,
> uint64_t val,
> uint32_t phy_addr, reg_num;
>
> phy_addr = (val & GEM_PHYMNTNC_ADDR) >> GEM_PHYMNTNC_ADDR_SHFT;
> - if (phy_addr == BOARD_PHY_ADDRESS || phy_addr == 0) {
> + if (phy_addr == BOARD_PHY_ADDRESS || phy_addr == 0 ||
> + phy_addr == s->phy_addr) {
> reg_num = (val & GEM_PHYMNTNC_REG) >> GEM_PHYMNTNC_REG_SHIFT;
> gem_phy_write(s, reg_num, val);
> }
> @@ -1682,6 +1684,7 @@ static Property gem_properties[] = {
> DEFINE_NIC_PROPERTIES(CadenceGEMState, conf),
> DEFINE_PROP_UINT32("revision", CadenceGEMState, revision,
> GEM_MODID_VALUE),
> + DEFINE_PROP_UINT8("phy-addr", CadenceGEMState, phy_addr, 0),
This patch would be complete by moving the BOARD_PHY_ADDRESS definition
to each board using this NIC, and setting the "phy-addr" property to
this value.
> DEFINE_PROP_UINT8("num-priority-queues", CadenceGEMState,
> num_priority_queues, 1),
> DEFINE_PROP_UINT8("num-type1-screeners", CadenceGEMState,
> diff --git a/include/hw/net/cadence_gem.h b/include/hw/net/cadence_gem.h
> index 54e646f..01c6189 100644
> --- a/include/hw/net/cadence_gem.h
> +++ b/include/hw/net/cadence_gem.h
> @@ -73,6 +73,8 @@ typedef struct CadenceGEMState {
> /* Mask of register bits which are write 1 to clear */
> uint32_t regs_w1c[CADENCE_GEM_MAXREG];
>
> + /* PHY address */
> + uint8_t phy_addr;
> /* PHY registers backing store */
> uint16_t phy_regs[32];
>
>
