On Tue, Aug 25, 2020 at 01:58:33PM -0700, Richard Henderson wrote: > Well, this is larger than I expected. > > I started off thinking conversion to decodetree would be quick, > after I reviewed the mttcg patches last week. Then I realized > that this could also use conversion to the generic translation loop. > Then I realized that there were a number of bugs, and some > inefficiencies, that could be fixed by using tcg exception unwind > properly. > > Hopefully most of these are small and easy to understand. > > I begin by adding enough stuff to test/tcg to make use of a > self-built musl cross-environment. I'll note that linuxtest > does not pass before or after this patch set -- I think that > linux-user/microblaze/signal.c needs work -- but that the > other tests do work. > > I also have an old copy of a microblaze system test image, > which I think used to be hosted on our wiki. After basic kernel > boot, it contains a "selftest" script which runs a bunch of > user-land isa tests. That still works fine too. > > HOWEVER: That's not nearly complete. There are cpu config options > that aren't default and I don't know how to change or test. > > In addition, the manual is really not clear on what's supposed to > happen under various edge conditions, especially with MSR[EE] unset. > E.g. unaligned access: Does the insn get nop-ed out? Do the low > bits of the address get ignored? Right now (before and after) the > access simply happens unaligned, which doesn't seem correct. > I assume the reason for having this configure option is to reduce > the size of the FPGA so that the unaligned access handling hw > simply isn't present. > > Lemme know what you think. >
It looks like our tests pass after adressing the issues I've mentioned so far. Don't know whats going on with the tcg_gen_lookup_and_goto_ptr issue, I'll double-check next week to make sure I didn't mess something up. Thanks, Edgar