From: Bin Meng <bin.m...@windriver.com>
This is an effort to clean up the hw/riscv directory. Ideally it
should only contain the RISC-V SoC / machine codes plus generic
codes. Let's move riscv_htif model to hw/char directory.
Signed-off-by: Bin Meng <bin.m...@windriver.com>
---
include/hw/{riscv => char}/riscv_htif.h | 0
hw/{riscv => char}/riscv_htif.c | 2 +-
hw/riscv/spike.c | 2 +-
hw/char/Kconfig | 3 +++
hw/char/meson.build | 1 +
hw/riscv/Kconfig | 3 ---
hw/riscv/meson.build | 1 -
7 files changed, 6 insertions(+), 6 deletions(-)
rename include/hw/{riscv => char}/riscv_htif.h (100%)
rename hw/{riscv => char}/riscv_htif.c (99%)
diff --git a/include/hw/riscv/riscv_htif.h b/include/hw/char/riscv_htif.h
similarity index 100%
rename from include/hw/riscv/riscv_htif.h
rename to include/hw/char/riscv_htif.h
diff --git a/hw/riscv/riscv_htif.c b/hw/char/riscv_htif.c
similarity index 99%
rename from hw/riscv/riscv_htif.c
rename to hw/char/riscv_htif.c
index ca87a5c..ba1af1c 100644
--- a/hw/riscv/riscv_htif.c
+++ b/hw/char/riscv_htif.c
@@ -24,10 +24,10 @@
#include "qapi/error.h"
#include "qemu/log.h"
#include "hw/sysbus.h"
+#include "hw/char/riscv_htif.h"
#include "hw/char/serial.h"
#include "chardev/char.h"
#include "chardev/char-fe.h"
-#include "hw/riscv/riscv_htif.h"
#include "qemu/timer.h"
#include "qemu/error-report.h"
diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c
index 59d9d87..3fd152a 100644
--- a/hw/riscv/spike.c
+++ b/hw/riscv/spike.c
@@ -31,11 +31,11 @@
#include "hw/loader.h"
#include "hw/sysbus.h"
#include "target/riscv/cpu.h"
-#include "hw/riscv/riscv_htif.h"
#include "hw/riscv/riscv_hart.h"
#include "hw/riscv/spike.h"
#include "hw/riscv/boot.h"
#include "hw/riscv/numa.h"
+#include "hw/char/riscv_htif.h"
#include "hw/intc/sifive_clint.h"
#include "chardev/char.h"
#include "sysemu/arch_init.h"
diff --git a/hw/char/Kconfig b/hw/char/Kconfig
index 1d64555..91da92f 100644
--- a/hw/char/Kconfig
+++ b/hw/char/Kconfig
@@ -1,6 +1,9 @@
config ESCC
bool
+config HTIF
+ bool
+
config PARALLEL
bool
default y
diff --git a/hw/char/meson.build b/hw/char/meson.build
index ae27932..3db623e 100644
--- a/hw/char/meson.build
+++ b/hw/char/meson.build
@@ -34,6 +34,7 @@ softmmu_ss.add(when: 'CONFIG_SH4', if_true:
files('sh_serial.c'))
softmmu_ss.add(when: 'CONFIG_STM32F2XX_USART', if_true:
files('stm32f2xx_usart.c'))
softmmu_ss.add(when: 'CONFIG_MCHP_PFSOC_MMUART', if_true:
files('mchp_pfsoc_mmuart.c'))
+specific_ss.add(when: 'CONFIG_HTIF', if_true: files('riscv_htif.c'))
specific_ss.add(when: 'CONFIG_TERMINAL3270', if_true: files('terminal3270.c'))
specific_ss.add(when: 'CONFIG_VIRTIO', if_true: files('virtio-serial-bus.c'))
specific_ss.add(when: 'CONFIG_PSERIES', if_true: files('spapr_vty.c'))
diff --git a/hw/riscv/Kconfig b/hw/riscv/Kconfig
index 23b7027..a0e256c 100644
--- a/hw/riscv/Kconfig
+++ b/hw/riscv/Kconfig
@@ -1,6 +1,3 @@
-config HTIF
- bool
-
config HART
bool
diff --git a/hw/riscv/meson.build b/hw/riscv/meson.build
index 535a142..619bf80 100644
--- a/hw/riscv/meson.build
+++ b/hw/riscv/meson.build
@@ -8,7 +8,6 @@ riscv_ss.add(when: 'CONFIG_SIFIVE', if_true:
files('sifive_test.c'))
riscv_ss.add(when: 'CONFIG_SIFIVE', if_true: files('sifive_uart.c'))
riscv_ss.add(when: 'CONFIG_SIFIVE_E', if_true: files('sifive_e.c'))
riscv_ss.add(when: 'CONFIG_SIFIVE_U', if_true: files('sifive_u.c'))
-riscv_ss.add(when: 'CONFIG_SPIKE', if_true: files('riscv_htif.c'))
riscv_ss.add(when: 'CONFIG_SPIKE', if_true: files('spike.c'))
riscv_ss.add(when: 'CONFIG_MICROCHIP_PFSOC', if_true:
files('microchip_pfsoc.c'))
--
2.7.4
