On 07/24/2011 10:10 AM, Max Filippov wrote: > This series adds support for Tensilica Xtensa target. > Port status: Linux for DC232B works in the qemu. > Not implemented xtensa options: MAC16, floating point coprocessor, > boolean option, cache option, debug option. > > v1 -> v2 changes: > - extract PS register and access control into separate patch; > - implement all memory protection options; > - GDB support. > > Max Filippov (31): > target-xtensa: add target stubs > target-xtensa: add target to the configure script > target-xtensa: implement disas_xtensa_insn > target-xtensa: implement narrow instructions > target-xtensa: implement RT0 group > target-xtensa: add sample board > target-xtensa: implement conditional jumps > target-xtensa: implement JX/RET0/CALLX > target-xtensa: add special and user registers > target-xtensa: implement RST3 group > target-xtensa: implement shifts (ST1 and RST1 groups) > target-xtensa: implement LSAI group > target-xtensa: mark reserved and TBD opcodes > target-xtensa: implement SYNC group > target-xtensa: implement CACHE group > target-xtensa: add PS register and access control > target-xtensa: implement exceptions > target-xtensa: implement RST2 group (32 bit mul/div/rem) > target-xtensa: implement windowed registers > target-xtensa: implement loop option > target-xtensa: implement extended L32R > target-xtensa: implement unaligned exception option > target-xtensa: implement SIMCALL > target-xtensa: implement interrupt option > target-xtensa: implement accurate window check > target-xtensa: implement CPENABLE and PRID SRs > target-xtensa: implement relocatable vectors > target-xtensa: add gdb support > target-xtensa: implement memory protection options > target-xtensa: add dc232b core and board > MAINTAINERS: add xtensa maintainer
All parts: Reviewed-by: Richard Henderson <r...@twiddle.net> I guess everything except the last couple of patches I'd already commented on in the last go-round. There's of course the conflict with the new Memory API that'll need to be resolved, but those are trivial changes. r~
