On Wed, Sep 23, 2020 at 09:55:14AM +0200, Julia Suvorova wrote:
> Provide a better explanation for the enabled bits in the _OSC control
> field. Base it on the latest specification due to new bits 5 and 6.
>
> Signed-off-by: Julia Suvorova <jus...@redhat.com>
> ---
> hw/i386/acpi-build.h | 11 +++++++++++
> hw/i386/acpi-build.c | 7 ++++++-
> 2 files changed, 17 insertions(+), 1 deletion(-)
>
> diff --git a/hw/i386/acpi-build.h b/hw/i386/acpi-build.h
> index 74df5fc612..bb5269d162 100644
> --- a/hw/i386/acpi-build.h
> +++ b/hw/i386/acpi-build.h
> @@ -5,6 +5,17 @@
>
> extern const struct AcpiGenericAddress x86_nvdimm_acpi_dsmio;
>
> +/* PCI Firmware Specification 3.2, Table 4-5 */
> +typedef enum {
> + ACPI_OSC_NATIVE_HP_EN = 0,
> + ACPI_OSC_SHPC_EN = 1,
> + ACPI_OSC_PME_EN = 2,
> + ACPI_OSC_AER_EN = 3,
> + ACPI_OSC_PCIE_CAP_EN = 4,
> + ACPI_OSC_LTR_EN = 5,
> + ACPI_OSC_ALLONES_INVALID = 6,
> +} AcpiOSCField;
> +
> void acpi_setup(void);
>
> #endif
> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> index 0e0535d2e3..b08f005a35 100644
> --- a/hw/i386/acpi-build.c
> +++ b/hw/i386/acpi-build.c
> @@ -1417,6 +1417,7 @@ static Aml *build_q35_osc_method(void)
> Aml *method;
> Aml *a_cwd1 = aml_name("CDW1");
> Aml *a_ctrl = aml_local(0);
> + unsigned osc_ctrl;
>
> method = aml_method("_OSC", 4, AML_NOTSERIALIZED);
> aml_append(method, aml_create_dword_field(aml_arg(3), aml_int(0),
> "CDW1"));
> @@ -1432,7 +1433,11 @@ static Aml *build_q35_osc_method(void)
> * Always allow native PME, AER (no dependencies)
> * Allow SHPC (PCI bridges can have SHPC controller)
> */
> - aml_append(if_ctx, aml_and(a_ctrl, aml_int(0x1F), a_ctrl));
> + osc_ctrl = BIT(ACPI_OSC_PME_EN) | BIT(ACPI_OSC_AER_EN) |
> + BIT(ACPI_OSC_PCIE_CAP_EN) | BIT(ACPI_OSC_NATIVE_HP_EN) |
> + BIT(ACPI_OSC_SHPC_EN);
> +
> + aml_append(if_ctx, aml_and(a_ctrl, aml_int(osc_ctrl), a_ctrl));
Now the comment above somewhat duplicates the enums. And decoding what
does each value mean is a head scratcher. As long as there's a single
use, we prefer comments to an enum, they can match spec exactly:
BIT(0) /* PCI Express Native Hotplug control */ |
BIT(4) /* SHPC Native Hotplug control */ |
etc ...
> if_ctx2 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(1))));
> /* Unknown revision */
> --
> 2.25.4
