On 10/28/2020 5:35 AM, Alex Bennée wrote:
Breakage in both system and linux-user emulation probably points at something in the instruction decode being broken. Shame we don't have a working risu setup for sparc64 to give the instruction handling a proper work out.
This is what I'm thinking too. Interesting bit is that sparc32 seem to work fine, and it should be the same codebase. I played a bit with a couple of days but couldn't isolate the faulty instruction. But I'd be happy to work on this issue with someone, perhaps from the sparc maintainers, to see if we can find out what's happening
