On 12/2/20 2:01 AM, chen huacai wrote:
> Hi, Philippe,
>
> On Wed, Dec 2, 2020 at 3:31 AM Philippe Mathieu-Daudé <f4...@amsat.org> wrote:
>>
>> Userland ELF binaries using Longsoon SIMD instructions have the
>> HWCAP_LOONGSON_MMI bit set [1].
>> Binaries compiled for Longsoon 3E [2] have the HWCAP_LOONGSON_EXT
>> bit set for the LQ / SQ instructions.
> What is Loongson-3E? I think you want to say Loongson-3A?
Yes =) I have been confused because I looked at the INSN_LOONGSON2E
and INSN_LOONGSON2F definitions earlier.
Are you OK with this patch if I change
- 3E -> 3A in subject and body
- Longsoon -> Loongson in body?
As you maybe noticed, since Loongson is currently the single MIPS
area with contributions, I am trying to strengthen it and ease its
maintenance by adding (and running) more tests.
>
> Huacai
>>
>> [1] commit 8e2d5831e4b ("target/mips: Legalize Loongson insn flags")
>> [2] commit af868995e1b ("target/mips: Add Loongson-3 CPU definition")
>>
>> Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
>> Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org>
>> ---
>> linux-user/elfload.c | 2 ++
>> 1 file changed, 2 insertions(+)
>>
>> diff --git a/linux-user/elfload.c b/linux-user/elfload.c
>> index 2ba42d8e4bd..5a39a7dc021 100644
>> --- a/linux-user/elfload.c
>> +++ b/linux-user/elfload.c
>> @@ -1023,6 +1023,8 @@ static uint32_t get_elf_hwcap(void)
>>
>> GET_FEATURE_REG_EQU(CP0_Config0, CP0C0_AR, 3, 2, HWCAP_MIPS_R6);
>> GET_FEATURE_REG_SET(CP0_Config3, 1 << CP0C3_MSAP, HWCAP_MIPS_MSA);
>> + GET_FEATURE_INSN(ASE_LMMI, HWCAP_LOONGSON_MMI);
>> + GET_FEATURE_INSN(ASE_LEXT, HWCAP_LOONGSON_EXT);
>>
>> return hwcaps;
>> }
>> --
>> 2.26.2
>
