Complete the MSA conversion with the LSA/DLSA opcodes, which are shared with the Release 6.
Keep going converting the removed opcodes. We now have 2 decoders on 32-bit, and 4 on 64-bit. Extensions are decoded first, then ISA. I might introduce a macro to have a generic decode() function to hide the 32/64 check, to keep the main decode_opc() loop easy to review. Series available here: https://gitlab.com/philmd/qemu/-/tree/mips_decodetree_lsa_r6 Regards, Phil. Philippe Mathieu-Daudé (13): !fixup "target/mips/translate: Add declarations for generic code" target/mips: Extract LSA/DLSA translation generators target/mips: Introduce decodetree helpers for MSA LSA/DLSA opcodes target/mips: Introduce decodetree helpers for Release6 LSA/DLSA opcodes target/mips: Remove now unreachable LSA/DLSA opcodes code target/mips: Convert Rel6 Special2 opcode to decodetree target/mips: Convert Rel6 COP1X opcode to decodetree target/mips: Convert Rel6 CACHE/PREF opcodes to decodetree target/mips: Convert Rel6 LWL/LWR/SWL/SWR opcodes to decodetree target/mips: Convert Rel6 LWLE/LWRE/SWLE/SWRE opcodes to decodetree target/mips: Convert Rel6 LDL/LDR/SDL/SDR opcodes to decodetree target/mips: Convert Rel6 LLD/SCD opcodes to decodetree target/mips: Convert Rel6 LL/SC opcodes to decodetree target/mips/translate.h | 21 +++++- target/mips/isa-mips32r6.decode | 36 ++++++++++ target/mips/isa-mips64r6.decode | 26 +++++++ target/mips/mod-msa32.decode | 4 ++ target/mips/mod-msa64.decode | 17 +++++ target/mips/isa-mips_rel6_translate.c | 40 +++++++++++ target/mips/mod-msa_translate.c | 15 ++++ target/mips/translate.c | 98 +++++++-------------------- target/mips/translate_addr_const.c | 54 +++++++++++++++ target/mips/meson.build | 9 +++ 10 files changed, 245 insertions(+), 75 deletions(-) create mode 100644 target/mips/isa-mips32r6.decode create mode 100644 target/mips/isa-mips64r6.decode create mode 100644 target/mips/mod-msa64.decode create mode 100644 target/mips/isa-mips_rel6_translate.c create mode 100644 target/mips/translate_addr_const.c -- 2.26.2