On 9/17/20 8:25 AM, Cédric Le Goater wrote: > On 9/17/20 2:55 AM, Joel Stanley wrote: >> On Wed, 16 Sep 2020 at 18:35, Sai Pavan Boddu <saip...@xilinx.com> wrote: >>> >>> Hi Philippe, >>> >>> >>> >>> We are looking to add eMMC support, I searched the mailing list and found a >>> series posted on eMMC by “Vincent Palatin” >>> >>> https://lists.gnu.org/archive/html/qemu-devel/2011-07/msg02833.html >> >> I would be interested in emmc support for the aspeed machines. Please >> cc me when you post patches. >> >>> I would like to consider the above work and mix-up with more changes to >>> start adding support for eMMC. Do you have any suggestions on the approach >>> followed in above patches ? >> >> The patches had minor review comments, but I assume the reason they >> didn't go anywhere is the author never followed up with further >> revisions. I would suggest applying them to the current tree, cleaning >> up any style changes that have happened since they were posted, and >> re-posting them for review. > > It seems we only care about these three patches : > > https://patchwork.ozlabs.org/patch/106762 > https://patchwork.ozlabs.org/patch/106761 > https://patchwork.ozlabs.org/patch/106763 > > It should not be too complex to get something going. >>> Note: Here is the existing support available in Xilinx fork, which might >>> require some work >>> https://github.com/Xilinx/qemu/blob/master/hw/sd/sd.c > > What are the relevant patches ?
FYI, aspeed machines successfully boot on top of 16G emmc disk images. I merged some of xilinx patches on top of the aspeed-6.0 branch to improve the model completeness but only the one fixing powerup was really necessary. The initial diffstat is rather small. hw/sd/sd.c | 168 ++++++++++++++++++++++++++++++++++++++++++------- We can surely find a way to merge support in mainline without covering the whole specs. The Extended CSD register would be the big part. See : https://github.com/legoater/qemu/commits/aspeed-6.0 Cheers, C.