Hello, Most important changes in this series are a fix for the support for external BMCs, when a QEMU Aspeed machine is used as a BMC instead of the simulator, and a cleanup of the LPC model which was handling the PNOR mapping.
The PNOR mapping is still a problem when using an external BMC and this would require some kind of framework to do memory ops on a remote memory region (LPC FW address space). Multi process might be a start for that using the proxy object. Something to study. Thanks, C. Cédric Le Goater (7): ppc/pnv: Add trace events for PCI event notification ppc/xive: Add firmware bit when dumping the ENDs ppc/pnv: Use skiboot addresses to load kernel and ramfs ppc/pnv: Simplify pnv_bmc_create() ppc/pnv: Discard internal BMC initialization when BMC is external ppc/pnv: Remove default disablement of the PNOR contents ppc/pnv: Introduce a LPC FW memory region attribute to map the PNOR include/hw/ppc/pnv.h | 1 + include/hw/ppc/xive_regs.h | 2 ++ hw/intc/pnv_xive.c | 3 +++ hw/intc/xive.c | 3 ++- hw/pci-host/pnv_phb4.c | 3 +++ hw/ppc/pnv.c | 17 ++++++++++++++--- hw/ppc/pnv_bmc.c | 22 +++++++++++++++------- hw/ppc/pnv_lpc.c | 15 --------------- hw/intc/trace-events | 3 +++ hw/pci-host/trace-events | 3 +++ 10 files changed, 46 insertions(+), 26 deletions(-) -- 2.26.2
