On 2/8/21 5:52 AM, Philippe Mathieu-Daudé wrote:
> On 2/8/21 9:42 AM, Alex Bennée wrote:
>>
>> Philippe Mathieu-Daudé <f4...@amsat.org> writes:
>>
>>> Refactor debug code as tlb_assert_iotlb_entry_for_ptr_present() helper.
>>>
>>> Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org>
>>> ---
>>> What this code does is out of my league, but refactoring it allow
>>> keeping tlb_addr_write() local to accel/tcg/cputlb.c in the next
>>> patch.
>>
>> The assertion that the table entry is current is just a simple
>> housekeeping one. The details of how the MTE implementation uses
>> (abuses?) the iotlb entries requires a closer reading of the code.
>>
>>> ---
>>> include/exec/exec-all.h | 9 +++++++++
>>> accel/tcg/cputlb.c | 14 ++++++++++++++
>>> target/arm/mte_helper.c | 11 ++---------
>>> target/arm/sve_helper.c | 10 ++--------
>>> 4 files changed, 27 insertions(+), 17 deletions(-)
>>>
>>> diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
>>> index f933c74c446..c5e8e355b7f 100644
>>> --- a/include/exec/exec-all.h
>>> +++ b/include/exec/exec-all.h
>>> @@ -296,6 +296,15 @@ void tlb_set_page_with_attrs(CPUState *cpu,
>>> target_ulong vaddr,
>>> void tlb_set_page(CPUState *cpu, target_ulong vaddr,
>>> hwaddr paddr, int prot,
>>> int mmu_idx, target_ulong size);
>>> +
>>> +/*
>>> + * Find the iotlbentry for ptr. This *must* be present in the TLB
>>> + * because we just found the mapping.
>>> + */
>>> +void tlb_assert_iotlb_entry_for_ptr_present(CPUArchState *env, int
>>> ptr_mmu_idx,
>>> + uint64_t ptr,
>>> + MMUAccessType ptr_access,
>>> + uintptr_t index);
>>
>> Probably worth making this an empty inline for the non CONFIG_DEBUG_TCG
>> case so we can eliminate the call to an empty function.
>
> But then we can't make tlb_addr_write() static (next patch) and
> we still have to include "tcg/tcg.h" for the TCG_OVERSIZED_GUEST
> definition...
Certainly you can, though it's not especially pretty:
#ifdef CONFIG_DEBUG_TCG
void tlb_assert_iotlb_entry_for_ptr_present
(CPUArchState *env, int ptr_mmu_idx,
uint64_t ptr, MMUAccessType ptr_access,
uintptr_t index);
#else
static inline void
tlb_assert_iotlb_entry_for_ptr_present
(CPUArchState *env, int ptr_mmu_idx,
uint64_t ptr, MMUAccessType ptr_access,
uintptr_t index)
{ }
#endif
r~
