Command line is
qemu-system-arm -machine mps3-an547 -nographic -kernel test.elf -semihosting
-semihosting-config enable=on,target=native
Binary is attached. It does
int main(int argc, char* argv[])
{
SCB->NSACR |= (3U << 10U); /* enable Non-secure access to
CP10 and CP11 coprocessors */
__DSB();
__ISB();
SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */
(3U << 11U*2U) ); /* enable CP11 Full Access */
__DSB();
__ISB();
// enable DL branch cache
#define CCR (*((volatile unsigned int *)0xE000ED14))
#define CCR_DL (1 << 19)
CCR |= CCR_DL;
__ISB();
uint32_t result;
__asm volatile ("VMRS %0, fpscr" : "=r" (result) ); // <-- NOCP
hardfault
printf("fpscr = 0x%08lx\r\n", result);
__asm volatile ("VMRS %0, mvfr0" : "=r" (result) );
printf("mvfr0 = 0x%08lx\r\n", result);
__asm volatile ("VMRS %0, mvfr1" : "=r" (result) );
printf("mvfr1 = 0x%08lx\r\n", result);
__asm volatile ("VMRS %0, mvfr2" : "=r" (result) );
printf("mvfr2 = 0x%08lx\r\n", result);
exit(0);
}
Thank you for your help!
** Attachment added: "test.elf"
https://bugs.launchpad.net/qemu/+bug/1923861/+attachment/5488449/+files/test.elf
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https://bugs.launchpad.net/bugs/1923861
Title:
Hardfault when accessing FPSCR register
Status in QEMU:
New
Bug description:
QEMU release version: v6.0.0-rc2
command line:
qemu-system-arm -machine mps3-an547 -nographic -kernel <my_project>.elf
-semihosting -semihosting-config enable=on,target=native
host operating system: Linux ISCNR90TMR1S 5.4.72-microsoft-standard-
WSL2 #1 SMP Wed Oct 28 23:40:43 UTC 2020 x86_64 x86_64 x86_64
GNU/Linux
guest operating system: none (bare metal)
Observation:
I am simulating embedded firmware for a Cortex-M55 device, using MPS3-AN547
machine. In the startup code I am accessing the FPSCR core register:
unsigned int fpscr =__get_FPSCR();
fpscr = fpscr & (~FPU_FPDSCR_AHP_Msk);
__set_FPSCR(fpscr);
where the register access functions __get_FPSCR() and
__set_FPSCR(fpscr) are taken from CMSIS_5 at
./CMSIS/Core/include/cmsis_gcc.h
I observe hardfaults upon __get_FPSCR() and __set_FPSCR(fpscr). The
same startup code works fine on the Arm Corstone-300 FVP (MPS3-AN547).
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