TL;DR: This series restrict TCG-specific objects by moving them to the tcg/ subdir. Code is moved around to satisfy 3 cases: { generic sysemu / tcg sysemu / tcg user}.
Since v2: - Merge do_translate_address into cpu_mips_translate_address - Added Thomas & Willian tags Since v1: - Addressed Richard review comments - Added Richard R-b tag Missing review: 5, 7, 8, 9, 18, 19, 24 Hi, This series move the MIPS TCG files under target/mips/tcg/. tcg/ is split into {sysemu and user}, and code common to both user/sysemu is left under tcg/ root. Non-user code is moved to sysemu/ (common to TCG and KVM). - Patches 1 & 11 are Meson generic - Patches 2 to 10 move generic symbols around to satisfly KVM linking - Patch 12 introduces tcg-internal.h where we'll move TCG specific prototypes from the current big internal.h - Patches 13-28 move code by topic (first user, then sysemu, then tcg) - Patch 29 restrict TCG specific machines to TCG (to actually only build malta/loongson3-virt machines when restricted to KVM) - Patch 30 finally add a CI job with "KVM-only" config: https://gitlab.com/philmd/qemu/-/jobs/1189874868 (12min 5sec) Diffstat is not that bad, and many #ifdef'ry removed. Please review, Phil. Based-on: <20210413081008.3409459-1-f4...@amsat.org> "exec: Remove accel/tcg/ from include paths" Philippe Mathieu-Daudé (30): target/mips: Simplify meson TCG rules target/mips: Move IEEE rounding mode array to new source file target/mips: Move msa_reset() to new source file target/mips: Make CPU/FPU regnames[] arrays global target/mips: Optimize CPU/FPU regnames[] arrays target/mips: Restrict mips_cpu_dump_state() to cpu.c target/mips: Turn printfpr() macro into a proper function target/mips: Declare mips_cpu_set_error_pc() inlined in "internal.h" target/mips: Merge do_translate_address into cpu_mips_translate_address target/mips: Extract load/store helpers to ldst_helper.c meson: Introduce meson_user_arch source set for arch-specific user-mode target/mips: Introduce tcg-internal.h for TCG specific declarations target/mips: Add simple user-mode mips_cpu_do_interrupt() target/mips: Add simple user-mode mips_cpu_tlb_fill() target/mips: Move cpu_signal_handler definition around target/mips: Move sysemu specific files under sysemu/ subfolder target/mips: Move physical addressing code to sysemu/physaddr.c target/mips: Restrict cpu_mips_get_random() / update_pagemask() to TCG target/mips: Move sysemu TCG-specific code to tcg/sysemu/ subfolder target/mips: Restrict mmu_init() to TCG target/mips: Move tlb_helper.c to tcg/sysemu/ target/mips: Restrict CPUMIPSTLBContext::map_address() handlers scope target/mips: Move Special opcodes to tcg/sysemu/special_helper.c target/mips: Move helper_cache() to tcg/sysemu/special_helper.c target/mips: Move TLB management helpers to tcg/sysemu/tlb_helper.c target/mips: Move exception management code to exception.c target/mips: Move CP0 helpers to sysemu/cp0.c target/mips: Move TCG source files under tcg/ sub directory hw/mips: Restrict non-virtualized machines to TCG gitlab-ci: Add KVM mips64el cross-build jobs meson.build | 6 + target/mips/helper.h | 183 +-- target/mips/internal.h | 106 +- target/mips/tcg/tcg-internal.h | 64 + target/mips/{ => tcg}/msa_helper.h.inc | 0 target/mips/tcg/sysemu_helper.h.inc | 185 +++ target/mips/{ => tcg}/mips32r6.decode | 0 target/mips/{ => tcg}/mips64r6.decode | 0 target/mips/{ => tcg}/msa32.decode | 0 target/mips/{ => tcg}/msa64.decode | 0 target/mips/{ => tcg}/tx79.decode | 0 target/mips/cpu.c | 311 ++--- target/mips/fpu.c | 25 + target/mips/msa.c | 60 + target/mips/op_helper.c | 1210 ------------------ target/mips/{ => sysemu}/addr.c | 0 target/mips/sysemu/cp0.c | 123 ++ target/mips/{ => sysemu}/cp0_timer.c | 0 target/mips/{ => sysemu}/machine.c | 0 target/mips/sysemu/physaddr.c | 257 ++++ target/mips/{ => tcg}/dsp_helper.c | 0 target/mips/tcg/exception.c | 167 +++ target/mips/{ => tcg}/fpu_helper.c | 8 - target/mips/tcg/ldst_helper.c | 288 +++++ target/mips/{ => tcg}/lmmi_helper.c | 0 target/mips/{ => tcg}/msa_helper.c | 36 - target/mips/{ => tcg}/msa_translate.c | 0 target/mips/{ => tcg}/mxu_translate.c | 0 target/mips/tcg/op_helper.c | 420 ++++++ target/mips/{ => tcg}/rel6_translate.c | 0 target/mips/{ => tcg/sysemu}/cp0_helper.c | 0 target/mips/{ => tcg/sysemu}/mips-semi.c | 0 target/mips/tcg/sysemu/special_helper.c | 173 +++ target/mips/{ => tcg/sysemu}/tlb_helper.c | 623 +++++---- target/mips/{ => tcg}/translate.c | 104 +- target/mips/{ => tcg}/translate_addr_const.c | 0 target/mips/{ => tcg}/tx79_translate.c | 0 target/mips/{ => tcg}/txx9_translate.c | 0 target/mips/tcg/user/tlb_helper.c | 64 + .gitlab-ci.d/crossbuilds.yml | 8 + MAINTAINERS | 3 +- hw/mips/meson.build | 11 +- target/mips/meson.build | 55 +- target/mips/sysemu/meson.build | 7 + target/mips/tcg/meson.build | 35 + target/mips/tcg/sysemu/meson.build | 6 + target/mips/tcg/user/meson.build | 3 + 47 files changed, 2394 insertions(+), 2147 deletions(-) create mode 100644 target/mips/tcg/tcg-internal.h rename target/mips/{ => tcg}/msa_helper.h.inc (100%) create mode 100644 target/mips/tcg/sysemu_helper.h.inc rename target/mips/{ => tcg}/mips32r6.decode (100%) rename target/mips/{ => tcg}/mips64r6.decode (100%) rename target/mips/{ => tcg}/msa32.decode (100%) rename target/mips/{ => tcg}/msa64.decode (100%) rename target/mips/{ => tcg}/tx79.decode (100%) create mode 100644 target/mips/fpu.c create mode 100644 target/mips/msa.c delete mode 100644 target/mips/op_helper.c rename target/mips/{ => sysemu}/addr.c (100%) create mode 100644 target/mips/sysemu/cp0.c rename target/mips/{ => sysemu}/cp0_timer.c (100%) rename target/mips/{ => sysemu}/machine.c (100%) create mode 100644 target/mips/sysemu/physaddr.c rename target/mips/{ => tcg}/dsp_helper.c (100%) create mode 100644 target/mips/tcg/exception.c rename target/mips/{ => tcg}/fpu_helper.c (99%) create mode 100644 target/mips/tcg/ldst_helper.c rename target/mips/{ => tcg}/lmmi_helper.c (100%) rename target/mips/{ => tcg}/msa_helper.c (99%) rename target/mips/{ => tcg}/msa_translate.c (100%) rename target/mips/{ => tcg}/mxu_translate.c (100%) create mode 100644 target/mips/tcg/op_helper.c rename target/mips/{ => tcg}/rel6_translate.c (100%) rename target/mips/{ => tcg/sysemu}/cp0_helper.c (100%) rename target/mips/{ => tcg/sysemu}/mips-semi.c (100%) create mode 100644 target/mips/tcg/sysemu/special_helper.c rename target/mips/{ => tcg/sysemu}/tlb_helper.c (76%) rename target/mips/{ => tcg}/translate.c (99%) rename target/mips/{ => tcg}/translate_addr_const.c (100%) rename target/mips/{ => tcg}/tx79_translate.c (100%) rename target/mips/{ => tcg}/txx9_translate.c (100%) create mode 100644 target/mips/tcg/user/tlb_helper.c create mode 100644 target/mips/sysemu/meson.build create mode 100644 target/mips/tcg/meson.build create mode 100644 target/mips/tcg/sysemu/meson.build create mode 100644 target/mips/tcg/user/meson.build -- 2.26.3