Hi Cedric,
On 4/21/21 12:01 PM, Cédric Le Goater wrote:
On 4/21/21 8:20 AM, Ravi Bangoria wrote:
Hi David,
On 4/19/21 10:23 AM, David Gibson wrote:
On Mon, Apr 12, 2021 at 05:14:33PM +0530, Ravi Bangoria wrote:
As per the PAPR, bit 0 of byte 64 in pa-features property indicates
availability of 2nd DAWR registers. i.e. If this bit is set, 2nd
DAWR is present, otherwise not. Use KVM_CAP_PPC_DAWR1 capability to
find whether kvm supports 2nd DAWR or not. If it's supported, allow
user to set the pa-feature bit in guest DT using cap-dawr1 machine
capability. Though, watchpoint on powerpc TCG guest is not supported
and thus 2nd DAWR is not enabled for TCG mode.
Signed-off-by: Ravi Bangoria <ravi.bango...@linux.ibm.com>
Reviewed-by: Greg Kurz <gr...@kaod.org>
So, I'm actually not sure if using an spapr capability is what we want
to do here. The problem is that presumably the idea is to at some
point make the DAWR1 capability default to on (on POWER10, at least).
But at that point you'll no longer to be able to start TCG guests
without explicitly disabling it. That's technically correct, since we
don't implement DAWR1 in TCG, but then we also don't implement DAWR0
and we let that slide... which I think is probably going to cause less
irritation on balance.
Ok. Probably something like this is what you want?
Power10 behavior:
- KVM does not support DAWR1: Boot the guest without DAWR1
support (No warnings). Error out only if user tries with
cap-dawr1=on.
- KVM supports DAWR1: Boot the guest with DAWR1 support, unless
user specifies cap-dawr1=off.
- TCG guest: Ignore cap-dawr1 i.e. boot as if there is only
DAWR0 (Should be fixed in future while adding PowerPC watch-
point support in TCG mode)
Power10 predecessor behavior:
- KVM guest: Boot the guest without DAWR1 support. Error out
if user tries with cap-dawr1=on.
- TCG guest: Ignore cap-dawr1 i.e. boot as if there is only
DAWR0 (Should be fixed in future while adding PowerPC watch-
point support in TCG mode)
I'm wondering if we're actually just better off setting the pa feature
just based on the guest CPU model. TCG will be broken if you try to
use it, but then, it already is. AFAIK there's no inherent reason we
couldn't implement DAWR support in TCG, it's just never been worth the
trouble.
Correct. Probably there is no practical usecase for DAWR in TCG mode.
What's the expected behavior ? Is it to generate a DSI if we have a DAWR
match ?
Yes. DSI is the main thing. But many auxiliary stuff, off the top of my
head:
- DAR needs to be set. Now, DAR value is set differently on p8 vs p10
(not sure about p9 because there was hw bug and thus we needed to
fully disable DAWR on p9).
- DAWR matching criteria for quadword instruction are different for
p8/p9 vs p10.
- P10 supports 512 byte unaligned watchpoints but p8/p9 does not.
Kernel is aware of these differences and thus handles these scenarios,
sometimes as special case. i.e. Qemu will need to mimic the exact hw
behavior for the specific revision of processor.
Thanks,
Ravi
