Improved readability and fixed a bug in tlb_flush_page_range_bits_by_mmuidx_async_0.
Rebecca Cran (4): accel/tcg: Add TLB invalidation support for ranges of addresses target/arm: Add support for FEAT_TLBIRANGE target/arm: Add support for FEAT_TLBIOS target/arm: set ID_AA64ISAR0.TLB to 2 for max AARCH64 CPU type accel/tcg/cputlb.c | 128 ++++++- include/exec/exec-all.h | 46 +++ target/arm/cpu.h | 10 + target/arm/cpu64.c | 1 + target/arm/helper.c | 371 ++++++++++++++++++++ 5 files changed, 553 insertions(+), 3 deletions(-) -- 2.26.2
