The VT82C686B south bridge is a single chipset. Model it as a single sysbus device. Move the vt82c686b_southbridge_init as via_southbridge_realize, add the QOM state: ViaSouthBridgeState. This device needs 2 properties to be realized: the PCI bus and its slot number. 2 aliases are exposed: the ISA PIC output IRQ and the I2C bus.
Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org> --- hw/mips/fuloong2e.c | 42 +++------------ hw/southbridge/vt82c686.c | 107 +++++++++++++++++++++++++++++++++++++ MAINTAINERS | 1 + hw/Kconfig | 1 + hw/isa/Kconfig | 9 ---- hw/meson.build | 1 + hw/southbridge/Kconfig | 8 +++ hw/southbridge/meson.build | 1 + 8 files changed, 127 insertions(+), 43 deletions(-) create mode 100644 hw/southbridge/vt82c686.c create mode 100644 hw/southbridge/Kconfig create mode 100644 hw/southbridge/meson.build diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c index 17b5e41cc7d..00aa085b982 100644 --- a/hw/mips/fuloong2e.c +++ b/hw/mips/fuloong2e.c @@ -34,10 +34,8 @@ #include "hw/mips/cpudevs.h" #include "hw/pci/pci.h" #include "hw/loader.h" -#include "hw/ide/pci.h" #include "hw/qdev-properties.h" #include "elf.h" -#include "hw/isa/vt82c686.h" #include "sysemu/qtest.h" #include "sysemu/reset.h" #include "sysemu/sysemu.h" @@ -197,36 +195,6 @@ static void main_cpu_reset(void *opaque) } } -static void vt82c686b_southbridge_init(PCIBus *pci_bus, int slot, qemu_irq intc, - I2CBus **i2c_bus) -{ - PCIDevice *dev; - DeviceState *isa; - - dev = pci_create_simple_multifunction(pci_bus, PCI_DEVFN(slot, 0), true, - TYPE_VT82C686B_ISA); - isa = DEVICE(dev); - qdev_connect_gpio_out_named(isa, "intr", 0, intc); - - dev = pci_create_simple(pci_bus, PCI_DEVFN(slot, 1), "via-ide"); - for (unsigned i = 0; i < 2; i++) { - qdev_connect_gpio_out_named(DEVICE(dev), "ide-irq", i, - qdev_get_gpio_in_named(isa, - "isa-irq", 14 + i)); - } - pci_ide_create_devs(dev); - - pci_create_simple(pci_bus, PCI_DEVFN(slot, 2), "vt82c686b-usb-uhci"); - pci_create_simple(pci_bus, PCI_DEVFN(slot, 3), "vt82c686b-usb-uhci"); - - dev = pci_create_simple(pci_bus, PCI_DEVFN(slot, 4), TYPE_VT82C686B_PM); - *i2c_bus = I2C_BUS(qdev_get_child_bus(DEVICE(dev), "i2c")); - - /* Audio support */ - pci_create_simple(pci_bus, PCI_DEVFN(slot, 5), TYPE_VIA_AC97); - pci_create_simple(pci_bus, PCI_DEVFN(slot, 6), TYPE_VIA_MC97); -} - /* Network support */ static void network_init(PCIBus *pci_bus) { @@ -323,8 +291,14 @@ static void mips_fuloong2e_init(MachineState *machine) pci_bus = bonito_init((qemu_irq *)&(env->irq[2])); /* South bridge -> IP5 */ - vt82c686b_southbridge_init(pci_bus, FULOONG2E_VIA_SLOT, env->irq[5], - &smbus); + dev = qdev_new("vt82c686b-southbridge"); + object_property_set_uint(OBJECT(dev), "pci-slot", + FULOONG2E_VIA_SLOT, &error_fatal); + object_property_set_link(OBJECT(dev), "pci-bus", + OBJECT(pci_bus), &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); + qdev_connect_gpio_out_named(dev, "intr", 0, env->irq[5]); + smbus = I2C_BUS(qdev_get_child_bus(dev, "i2c")); /* GPU */ if (vga_interface_type != VGA_NONE) { diff --git a/hw/southbridge/vt82c686.c b/hw/southbridge/vt82c686.c new file mode 100644 index 00000000000..61c3e6ae306 --- /dev/null +++ b/hw/southbridge/vt82c686.c @@ -0,0 +1,107 @@ +/* + * VT82C686B south bridge emulation + * + * Copyright (c) 2008 yajin (ya...@vm-kernel.org) + * Copyright (c) 2009 chenming (chenm...@rdc.faw.com.cn) + * Copyright (c) 2010 Huacai Chen (zltjiang...@gmail.com) + * Copyright (c) 2021 Philippe Mathieu-Daudé <f4...@amsat.org> + * This code is licensed under the GNU GPL v2. + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "hw/qdev-properties.h" +#include "hw/sysbus.h" +#include "hw/pci/pci.h" +#include "hw/ide/pci.h" +#include "hw/isa/vt82c686.h" + +#define TYPE_VT82C686B_SOUTHBRIDGE "vt82c686b-southbridge" +OBJECT_DECLARE_SIMPLE_TYPE(ViaSouthBridgeState, VT82C686B_SOUTHBRIDGE) + +struct ViaSouthBridgeState { + /* <private> */ + SysBusDevice parent_obj; + /* <public> */ + + uint8_t pci_slot; + PCIBus *pci_bus; + PCIDevice *isa; + PCIDevice *ide; + PCIDevice *usb[2]; + PCIDevice *apm; + PCIDevice *audio; + PCIDevice *modem; +}; + +static void via_southbridge_realize(DeviceState *dev, Error **errp) +{ + ViaSouthBridgeState *s = VT82C686B_SOUTHBRIDGE(dev); + + if (!s->pci_bus) { + error_setg(errp, "SMMU is not attached to any PCI bus!"); + return; + } + + s->isa = pci_create_simple_multifunction(s->pci_bus, + PCI_DEVFN(s->pci_slot, 0), + true, TYPE_VT82C686B_ISA); + qdev_pass_gpios(DEVICE(s->isa), dev, "intr"); + + s->ide = pci_create_simple(s->pci_bus, + PCI_DEVFN(s->pci_slot, 1), "via-ide"); + for (unsigned i = 0; i < 2; i++) { + qdev_connect_gpio_out_named(DEVICE(s->ide), "ide-irq", i, + qdev_get_gpio_in_named(DEVICE(s->isa), + "isa-irq", 14 + i)); + } + pci_ide_create_devs(s->ide); + + s->usb[0] = pci_create_simple(s->pci_bus, + PCI_DEVFN(s->pci_slot, 2), + "vt82c686b-usb-uhci"); + s->usb[1] = pci_create_simple(s->pci_bus, + PCI_DEVFN(s->pci_slot, 3), + "vt82c686b-usb-uhci"); + + s->apm = pci_create_simple(s->pci_bus, + PCI_DEVFN(s->pci_slot, 4), + TYPE_VT82C686B_PM); + object_property_add_alias(OBJECT(s), "i2c", + OBJECT(s->apm), "i2c"); + + s->audio = pci_create_simple(s->pci_bus, + PCI_DEVFN(s->pci_slot, 5), + TYPE_VIA_AC97); + s->modem = pci_create_simple(s->pci_bus, + PCI_DEVFN(s->pci_slot, 6), + TYPE_VIA_MC97); +} + +static Property via_southbridge_properties[] = { + DEFINE_PROP_UINT8("pci-slot", ViaSouthBridgeState, pci_slot, 0), + DEFINE_PROP_LINK("pci-bus", ViaSouthBridgeState, pci_bus, "PCI", PCIBus *), + DEFINE_PROP_END_OF_LIST(), +}; + +static void via_southbridge_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + + dc->realize = via_southbridge_realize; + device_class_set_props(dc, via_southbridge_properties); +} + +static const TypeInfo via_southbridge_info = { + .name = TYPE_VT82C686B_SOUTHBRIDGE, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(ViaSouthBridgeState), + .class_init = via_southbridge_class_init, +}; + +static void via_southbridge_register_types(void) +{ + type_register_static(&via_southbridge_info); +} + +type_init(via_southbridge_register_types) diff --git a/MAINTAINERS b/MAINTAINERS index b692c8fbee2..3275479672a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1204,6 +1204,7 @@ S: Odd Fixes F: hw/mips/fuloong2e.c F: hw/isa/vt82c686.c F: hw/pci-host/bonito.c +F: hw/southbridge/vt82c686.c F: hw/usb/vt82c686-uhci-pci.c F: include/hw/isa/vt82c686.h diff --git a/hw/Kconfig b/hw/Kconfig index ff40bd3f7bb..76e35ad189f 100644 --- a/hw/Kconfig +++ b/hw/Kconfig @@ -32,6 +32,7 @@ source rtc/Kconfig source scsi/Kconfig source sd/Kconfig source smbios/Kconfig +source southbridge/Kconfig source ssi/Kconfig source timer/Kconfig source tpm/Kconfig diff --git a/hw/isa/Kconfig b/hw/isa/Kconfig index 55e0003ce40..34adc411fa6 100644 --- a/hw/isa/Kconfig +++ b/hw/isa/Kconfig @@ -41,15 +41,6 @@ config PIIX4 select ISA_BUS select USB_UHCI -config VT82C686 - bool - select ISA_SUPERIO - select ACPI_SMBUS - select SERIAL_ISA - select FDC - select USB_UHCI - select APM - config SMC37C669 bool select ISA_SUPERIO diff --git a/hw/meson.build b/hw/meson.build index 8ba79b1a528..4bdd254e041 100644 --- a/hw/meson.build +++ b/hw/meson.build @@ -31,6 +31,7 @@ subdir('scsi') subdir('sd') subdir('smbios') +subdir('southbridge') subdir('ssi') subdir('timer') subdir('tpm') diff --git a/hw/southbridge/Kconfig b/hw/southbridge/Kconfig new file mode 100644 index 00000000000..9cd9fe5ee64 --- /dev/null +++ b/hw/southbridge/Kconfig @@ -0,0 +1,8 @@ +config VT82C686 + bool + select ISA_SUPERIO + select ACPI_SMBUS + select SERIAL_ISA + select FDC + select USB_UHCI + select APM diff --git a/hw/southbridge/meson.build b/hw/southbridge/meson.build new file mode 100644 index 00000000000..53b02e9563c --- /dev/null +++ b/hw/southbridge/meson.build @@ -0,0 +1 @@ +softmmu_ss.add(when: 'CONFIG_VT82C686', if_true: files('vt82c686.c')) -- 2.26.3