On 04.10.2011, at 00:07, Scott Wood wrote: > On 10/03/2011 05:06 PM, Alexander Graf wrote: >> >> On 03.10.2011, at 23:50, Scott Wood wrote: >> >>> On 10/03/2011 04:36 PM, Alexander Graf wrote: >>>> With TCG, we're never executing guest code directly, but always go >>>> through TCG to emulate it. So the only case where we actually need to >>>> flush the icache is in TCG code generation, never outside, right? >>> >>> Right. >>> >>>> For KVM, I agree. We need some indication to flush the cache. But it >>>> doesn't have to be done that complicated. We can simply do an inline >>>> function that gets always called and has a few conditionals on when >>>> to actually flush. That inline function could easily be a nop on >>>> !ppc, though I'm not 100% sure that no other arch needs this. >>> >>> It's already an inline function that's a nop on !ppc. What >>> simplification do you suggest? >> >> Is flush_icache_range() always defined on all hosts with all compiler >> variants that QEMU supports? If not, we should have a small wrapper >> that explicitly makes it a nop on !ppc. CC'ing Paolo and Richard for >> clarification. > > It's defined in cache-utils.h using GCC-style inline asm, and is a no-op > if _ARCH_PPC is not defined.
Ah, there it's hiding. It sounded a lot like the gcc built-in version. So all we need is a nop'ing version in the !_ARCH_PPC case, right? And then later some way to make book3s fast again for coherent caching machines. Alex