On Tue, May 18, 2021 at 03:11:38PM -0500, Richard Henderson wrote: > Instead, use a switch on env->mmu_model. This avoids some > replicated information in cpu setup.
I have mixed feelings about this, since I introduced pcc->handle_mmu_fault specifically to get rid of the nasty mega-switch, with the hope of eventually getting rid of env->mmu_model entirely. But.. it does simplify your patch series, which makes a good change overall. > > Signed-off-by: Richard Henderson <richard.hender...@linaro.org> > --- > target/ppc/cpu-qom.h | 1 - > target/ppc/cpu_init.c | 45 ----------------------------------------- > target/ppc/mmu_helper.c | 24 ++++++++++++++++++---- > 3 files changed, 20 insertions(+), 50 deletions(-) > > diff --git a/target/ppc/cpu-qom.h b/target/ppc/cpu-qom.h > index 06b6571bc9..3b14d2f134 100644 > --- a/target/ppc/cpu-qom.h > +++ b/target/ppc/cpu-qom.h > @@ -198,7 +198,6 @@ struct PowerPCCPUClass { > int n_host_threads; > void (*init_proc)(CPUPPCState *env); > int (*check_pow)(CPUPPCState *env); > - int (*handle_mmu_fault)(PowerPCCPU *cpu, vaddr eaddr, int rwx, int > mmu_idx); > bool (*interrupts_big_endian)(PowerPCCPU *cpu); > }; > > diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c > index d0fa219880..d33aded7cf 100644 > --- a/target/ppc/cpu_init.c > +++ b/target/ppc/cpu_init.c > @@ -4580,9 +4580,6 @@ POWERPC_FAMILY(601)(ObjectClass *oc, void *data) > (1ull << MSR_IR) | > (1ull << MSR_DR); > pcc->mmu_model = POWERPC_MMU_601; > -#if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; > -#endif > pcc->excp_model = POWERPC_EXCP_601; > pcc->bus_model = PPC_FLAGS_INPUT_6xx; > pcc->bfd_mach = bfd_mach_ppc_601; > @@ -4625,9 +4622,6 @@ POWERPC_FAMILY(601v)(ObjectClass *oc, void *data) > (1ull << MSR_IR) | > (1ull << MSR_DR); > pcc->mmu_model = POWERPC_MMU_601; > -#if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; > -#endif > pcc->bus_model = PPC_FLAGS_INPUT_6xx; > pcc->bfd_mach = bfd_mach_ppc_601; > pcc->flags = POWERPC_FLAG_SE | POWERPC_FLAG_RTC_CLK | > POWERPC_FLAG_HID0_LE; > @@ -4891,9 +4885,6 @@ POWERPC_FAMILY(604)(ObjectClass *oc, void *data) > (1ull << MSR_RI) | > (1ull << MSR_LE); > pcc->mmu_model = POWERPC_MMU_32B; > -#if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; > -#endif > pcc->excp_model = POWERPC_EXCP_604; > pcc->bus_model = PPC_FLAGS_INPUT_6xx; > pcc->bfd_mach = bfd_mach_ppc_604; > @@ -4975,9 +4966,6 @@ POWERPC_FAMILY(604E)(ObjectClass *oc, void *data) > (1ull << MSR_RI) | > (1ull << MSR_LE); > pcc->mmu_model = POWERPC_MMU_32B; > -#if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; > -#endif > pcc->excp_model = POWERPC_EXCP_604; > pcc->bus_model = PPC_FLAGS_INPUT_6xx; > pcc->bfd_mach = bfd_mach_ppc_604; > @@ -5046,9 +5034,6 @@ POWERPC_FAMILY(740)(ObjectClass *oc, void *data) > (1ull << MSR_RI) | > (1ull << MSR_LE); > pcc->mmu_model = POWERPC_MMU_32B; > -#if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; > -#endif > pcc->excp_model = POWERPC_EXCP_7x0; > pcc->bus_model = PPC_FLAGS_INPUT_6xx; > pcc->bfd_mach = bfd_mach_ppc_750; > @@ -5126,9 +5111,6 @@ POWERPC_FAMILY(750)(ObjectClass *oc, void *data) > (1ull << MSR_RI) | > (1ull << MSR_LE); > pcc->mmu_model = POWERPC_MMU_32B; > -#if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; > -#endif > pcc->excp_model = POWERPC_EXCP_7x0; > pcc->bus_model = PPC_FLAGS_INPUT_6xx; > pcc->bfd_mach = bfd_mach_ppc_750; > @@ -5329,9 +5311,6 @@ POWERPC_FAMILY(750cl)(ObjectClass *oc, void *data) > (1ull << MSR_RI) | > (1ull << MSR_LE); > pcc->mmu_model = POWERPC_MMU_32B; > -#if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; > -#endif > pcc->excp_model = POWERPC_EXCP_7x0; > pcc->bus_model = PPC_FLAGS_INPUT_6xx; > pcc->bfd_mach = bfd_mach_ppc_750; > @@ -5412,9 +5391,6 @@ POWERPC_FAMILY(750cx)(ObjectClass *oc, void *data) > (1ull << MSR_RI) | > (1ull << MSR_LE); > pcc->mmu_model = POWERPC_MMU_32B; > -#if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; > -#endif > pcc->excp_model = POWERPC_EXCP_7x0; > pcc->bus_model = PPC_FLAGS_INPUT_6xx; > pcc->bfd_mach = bfd_mach_ppc_750; > @@ -5500,9 +5476,6 @@ POWERPC_FAMILY(750fx)(ObjectClass *oc, void *data) > (1ull << MSR_RI) | > (1ull << MSR_LE); > pcc->mmu_model = POWERPC_MMU_32B; > -#if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; > -#endif > pcc->excp_model = POWERPC_EXCP_7x0; > pcc->bus_model = PPC_FLAGS_INPUT_6xx; > pcc->bfd_mach = bfd_mach_ppc_750; > @@ -5588,9 +5561,6 @@ POWERPC_FAMILY(750gx)(ObjectClass *oc, void *data) > (1ull << MSR_RI) | > (1ull << MSR_LE); > pcc->mmu_model = POWERPC_MMU_32B; > -#if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; > -#endif > pcc->excp_model = POWERPC_EXCP_7x0; > pcc->bus_model = PPC_FLAGS_INPUT_6xx; > pcc->bfd_mach = bfd_mach_ppc_750; > @@ -5830,9 +5800,6 @@ POWERPC_FAMILY(7400)(ObjectClass *oc, void *data) > (1ull << MSR_RI) | > (1ull << MSR_LE); > pcc->mmu_model = POWERPC_MMU_32B; > -#if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; > -#endif > pcc->excp_model = POWERPC_EXCP_74xx; > pcc->bus_model = PPC_FLAGS_INPUT_6xx; > pcc->bfd_mach = bfd_mach_ppc_7400; > @@ -5916,9 +5883,6 @@ POWERPC_FAMILY(7410)(ObjectClass *oc, void *data) > (1ull << MSR_RI) | > (1ull << MSR_LE); > pcc->mmu_model = POWERPC_MMU_32B; > -#if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; > -#endif > pcc->excp_model = POWERPC_EXCP_74xx; > pcc->bus_model = PPC_FLAGS_INPUT_6xx; > pcc->bfd_mach = bfd_mach_ppc_7400; > @@ -6745,9 +6709,6 @@ POWERPC_FAMILY(e600)(ObjectClass *oc, void *data) > (1ull << MSR_RI) | > (1ull << MSR_LE); > pcc->mmu_model = POWERPC_MMU_32B; > -#if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash32_handle_mmu_fault; > -#endif > pcc->excp_model = POWERPC_EXCP_74xx; > pcc->bus_model = PPC_FLAGS_INPUT_6xx; > pcc->bfd_mach = bfd_mach_ppc_7400; > @@ -7507,7 +7468,6 @@ POWERPC_FAMILY(970)(ObjectClass *oc, void *data) > (1ull << MSR_RI); > pcc->mmu_model = POWERPC_MMU_64B; > #if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash64_handle_mmu_fault; > pcc->hash64_opts = &ppc_hash64_opts_basic; > #endif > pcc->excp_model = POWERPC_EXCP_970; > @@ -7585,7 +7545,6 @@ POWERPC_FAMILY(POWER5P)(ObjectClass *oc, void *data) > LPCR_RMI | LPCR_HDICE; > pcc->mmu_model = POWERPC_MMU_2_03; > #if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash64_handle_mmu_fault; > pcc->hash64_opts = &ppc_hash64_opts_basic; > pcc->lrg_decr_bits = 32; > #endif > @@ -7729,7 +7688,6 @@ POWERPC_FAMILY(POWER7)(ObjectClass *oc, void *data) > pcc->lpcr_pm = LPCR_P7_PECE0 | LPCR_P7_PECE1 | LPCR_P7_PECE2; > pcc->mmu_model = POWERPC_MMU_2_06; > #if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash64_handle_mmu_fault; > pcc->hash64_opts = &ppc_hash64_opts_POWER7; > pcc->lrg_decr_bits = 32; > #endif > @@ -7906,7 +7864,6 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data) > LPCR_P8_PECE3 | LPCR_P8_PECE4; > pcc->mmu_model = POWERPC_MMU_2_07; > #if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc_hash64_handle_mmu_fault; > pcc->hash64_opts = &ppc_hash64_opts_POWER7; > pcc->lrg_decr_bits = 32; > pcc->n_host_threads = 8; > @@ -8122,7 +8079,6 @@ POWERPC_FAMILY(POWER9)(ObjectClass *oc, void *data) > pcc->lpcr_pm = LPCR_PDEE | LPCR_HDEE | LPCR_EEE | LPCR_DEE | LPCR_OEE; > pcc->mmu_model = POWERPC_MMU_3_00; > #if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc64_v3_handle_mmu_fault; > /* segment page size remain the same */ > pcc->hash64_opts = &ppc_hash64_opts_POWER7; > pcc->radix_page_info = &POWER9_radix_page_info; > @@ -8334,7 +8290,6 @@ POWERPC_FAMILY(POWER10)(ObjectClass *oc, void *data) > pcc->lpcr_pm = LPCR_PDEE | LPCR_HDEE | LPCR_EEE | LPCR_DEE | LPCR_OEE; > pcc->mmu_model = POWERPC_MMU_3_00; > #if defined(CONFIG_SOFTMMU) > - pcc->handle_mmu_fault = ppc64_v3_handle_mmu_fault; > /* segment page size remain the same */ > pcc->hash64_opts = &ppc_hash64_opts_POWER7; > pcc->radix_page_info = &POWER10_radix_page_info; > diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c > index ef634fcb33..863e556a22 100644 > --- a/target/ppc/mmu_helper.c > +++ b/target/ppc/mmu_helper.c > @@ -2963,14 +2963,30 @@ bool ppc_cpu_tlb_fill(CPUState *cs, vaddr addr, int > size, > bool probe, uintptr_t retaddr) > { > PowerPCCPU *cpu = POWERPC_CPU(cs); > - PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cs); > CPUPPCState *env = &cpu->env; > int ret; > > - if (pcc->handle_mmu_fault) { > - ret = pcc->handle_mmu_fault(cpu, addr, access_type, mmu_idx); > - } else { > + switch (env->mmu_model) { > +#if defined(TARGET_PPC64) > + case POWERPC_MMU_64B: > + case POWERPC_MMU_2_03: > + case POWERPC_MMU_2_06: > + case POWERPC_MMU_2_07: > + ret = ppc_hash64_handle_mmu_fault(cpu, addr, access_type, mmu_idx); > + break; > + case POWERPC_MMU_3_00: > + ret = ppc64_v3_handle_mmu_fault(cpu, addr, access_type, mmu_idx); > + break; > +#endif > + > + case POWERPC_MMU_32B: > + case POWERPC_MMU_601: > + ret = ppc_hash32_handle_mmu_fault(cpu, addr, access_type, mmu_idx); > + break; > + > + default: > ret = cpu_ppc_handle_mmu_fault(env, addr, access_type, mmu_idx); > + break; > } > if (unlikely(ret != 0)) { > if (probe) { -- David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson
signature.asc
Description: PGP signature