On Mon, Jun 7, 2021 at 1:09 PM LIU Zhiwei <zhiwei_...@c-sky.com> wrote: > > Hi Alistair, > > As I see, we are moving on to remove TARGET_RISCV64 macro. > > I have some questions: > > 1) Which tcg op should use when translate an instruction for 32bit cpu. > The tcg_*_i64, tcg_*_i32 or tcg_*_tl? > I see some API such as gen_get_gpr that are using the tcg_*_tl. But I am > not sure if it is > right for 32bit cpu.
Do you mean for an instruction that only runs on a 32-bit CPU (and not RV64)? If the instruction only supports a 32-bit value then tcg_*_i32 otherwise tcg_*_tl is probably the best bet. > > 2) Do we should have a sign-extend 64 bit register(bit 31 as the sign > bit) for 32 bit cpu? I'm not clear what you mean. Can you point to a spec that you are trying to implement? Alistair > > Best Regards, > Zhiwei > >
