On Mon, 14 Jun 2021 at 09:38, Richard Henderson <richard.hender...@linaro.org> wrote: > > For the sf version, we are performing two 32-bit bswaps > in either half of the register. This is equivalent to > performing one 64-bit bswap followed by a rotate. > > For the non-sf version, we can remove TCG_BSWAP_IZ > and the preceding zero-extension. > > Cc: Peter Maydell <peter.mayd...@linaro.org> > Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org> thanks -- PMM
