The existing interpreter zero-extends, ignoring high bits.
Simply add a separate sign-extension opcode if required.
Ensure that the interpreter supports ext16s when bswap16 is enabled.
Reviewed-by: Philippe Mathieu-Daudé <f4...@amsat.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
---
tcg/tci.c | 3 ++-
tcg/tci/tcg-target.c.inc | 23 ++++++++++++++++++++---
2 files changed, 22 insertions(+), 4 deletions(-)
diff --git a/tcg/tci.c b/tcg/tci.c
index d68c5a4e55..109522a865 100644
--- a/tcg/tci.c
+++ b/tcg/tci.c
@@ -733,7 +733,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState
*env,
regs[r0] = (int8_t)regs[r1];
break;
#endif
-#if TCG_TARGET_HAS_ext16s_i32 || TCG_TARGET_HAS_ext16s_i64
+#if TCG_TARGET_HAS_ext16s_i32 || TCG_TARGET_HAS_ext16s_i64 || \
+ TCG_TARGET_HAS_bswap16_i32 || TCG_TARGET_HAS_bswap16_i64
CASE_32_64(ext16s)
tci_args_rr(&tb_ptr, &r0, &r1);
regs[r0] = (int16_t)regs[r1];
diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc
index 823ecd5d35..1e92688dca 100644
--- a/tcg/tci/tcg-target.c.inc
+++ b/tcg/tci/tcg-target.c.inc
@@ -617,6 +617,8 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
const TCGArg args[TCG_MAX_OP_ARGS],
const int const_args[TCG_MAX_OP_ARGS])
{
+ TCGOpcode exts;
+
switch (opc) {
case INDEX_op_exit_tb:
tcg_out_op_p(s, opc, (void *)args[0]);
@@ -710,12 +712,27 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
CASE_64(ext32u) /* Optional (TCG_TARGET_HAS_ext32u_i64). */
CASE_64(ext_i32)
CASE_64(extu_i32)
- CASE_32_64(bswap16) /* Optional (TCG_TARGET_HAS_bswap16_*). */
- CASE_32_64(bswap32) /* Optional (TCG_TARGET_HAS_bswap32_*). */
- CASE_64(bswap64) /* Optional (TCG_TARGET_HAS_bswap64_i64). */
+ case INDEX_op_bswap32_i32: /* Optional (TCG_TARGET_HAS_bswap32_i32). */
+ case INDEX_op_bswap64_i64: /* Optional (TCG_TARGET_HAS_bswap64_i64). */
tcg_out_op_rr(s, opc, args[0], args[1]);
break;
+ case INDEX_op_bswap16_i32: /* Optional (TCG_TARGET_HAS_bswap16_i32). */
+ exts = INDEX_op_ext16s_i32;
+ goto do_bswap;
+ case INDEX_op_bswap16_i64: /* Optional (TCG_TARGET_HAS_bswap16_i64). */
+ exts = INDEX_op_ext16s_i64;
+ goto do_bswap;
+ case INDEX_op_bswap32_i64: /* Optional (TCG_TARGET_HAS_bswap32_i64). */
+ exts = INDEX_op_ext32s_i64;
+ do_bswap:
+ /* The base tci bswaps zero-extend, and ignore high bits. */
+ tcg_out_op_rr(s, opc, args[0], args[1]);
+ if (args[2] & TCG_BSWAP_OS) {
+ tcg_out_op_rr(s, exts, args[0], args[0]);
+ }
+ break;
+
#if TCG_TARGET_REG_BITS == 32
case INDEX_op_add2_i32:
case INDEX_op_sub2_i32:
--
2.25.1
