On 2011-10-17 17:43, Michael S. Tsirkin wrote: > On Mon, Oct 17, 2011 at 11:27:46AM +0200, Jan Kiszka wrote: >> This cache will help us implementing KVM in-kernel irqchip support >> without spreading hooks all over the place. >> >> KVM requires us to register it first and then deliver it by raising a >> pseudo IRQ line returned on registration. While this could be changed >> for QEMU-originated MSI messages by adding direct MSI injection, we will >> still need this translation for irqfd-originated messages. The >> MSIRoutingCache will allow to track those registrations and update them >> lazily before the actual delivery. This avoid having to track MSI >> vectors at device level (like qemu-kvm currently does). >> >> Signed-off-by: Jan Kiszka <jan.kis...@siemens.com> > > So if many devices are added, exhausting the number of GSIs supported, > we get terrible performance intead of simply failing outright. > > To me, this looks more like a bug than a feature ...
If that ever turns out to be a bottleneck, failing looks like the worst we can do. Reporting excessive cache flushes would make some sense and could still be added. Jan
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