On Tue, Oct 19, 2021 at 11:45 AM Warner Losh <i...@bsdimp.com> wrote: > > Move the machine context to the CPU state. > > Signed-off-by: Stacey Son <s...@freebsd.org> > Signed-off-by: Klye Evans <kev...@freebsd.org> > Signed-off-by: Warner Losh <i...@bsdimp.com> > --- > bsd-user/arm/target_arch_signal.h | 31 +++++++++++++++++++++++++++++++ > 1 file changed, 31 insertions(+) > > diff --git a/bsd-user/arm/target_arch_signal.h > b/bsd-user/arm/target_arch_signal.h > index 302fdc2846..1d051af9ae 100644 > --- a/bsd-user/arm/target_arch_signal.h > +++ b/bsd-user/arm/target_arch_signal.h > @@ -201,4 +201,35 @@ static inline abi_long get_mcontext(CPUARMState *regs, > target_mcontext_t *mcp, > return err; > } > > +/* Compare to arm/arm/machdep.c set_mcontext() */ > +static inline abi_long set_mcontext(CPUARMState *regs, target_mcontext_t > *mcp, > + int srflag) > +{ > + int err = 0; > + const uint32_t *gr = mcp->__gregs; > + uint32_t cpsr; > + > + regs->regs[0] = tswap32(gr[TARGET_REG_R0]); > + regs->regs[1] = tswap32(gr[TARGET_REG_R1]); > + regs->regs[2] = tswap32(gr[TARGET_REG_R2]); > + regs->regs[3] = tswap32(gr[TARGET_REG_R3]); > + regs->regs[4] = tswap32(gr[TARGET_REG_R4]); > + regs->regs[5] = tswap32(gr[TARGET_REG_R5]); > + regs->regs[6] = tswap32(gr[TARGET_REG_R6]); > + regs->regs[7] = tswap32(gr[TARGET_REG_R7]); > + regs->regs[8] = tswap32(gr[TARGET_REG_R8]); > + regs->regs[9] = tswap32(gr[TARGET_REG_R9]); > + regs->regs[10] = tswap32(gr[TARGET_REG_R10]); > + regs->regs[11] = tswap32(gr[TARGET_REG_R11]); > + regs->regs[12] = tswap32(gr[TARGET_REG_R12]); > + > + regs->regs[13] = tswap32(gr[TARGET_REG_SP]); > + regs->regs[14] = tswap32(gr[TARGET_REG_LR]); > + regs->regs[15] = tswap32(gr[TARGET_REG_PC]); > + cpsr = tswap32(gr[TARGET_REG_CPSR]); > + cpsr_write(regs, cpsr, CPSR_USER | CPSR_EXEC, CPSRWriteByInstr); > + > + return err; > +} > + > #endif /* !_TARGET_ARCH_SIGNAL_H_ */ > -- > 2.32.0 >
Reviewed-by: Kyle Evans <kev...@freebsd.org>