On 11/17/21 10:20 AM, Alistair Francis wrote:
From: Alistair Francis <alistair.fran...@wdc.com>
The following changes since commit 8d5fcb1990bc64b62c0bc12121fe510940be5664:
Merge tag 'python-pull-request' of https://gitlab.com/jsnow/qemu into
staging (2021-11-17 07:41:08 +0100)
are available in the Git repository at:
g...@github.com:alistair23/qemu.git tags/pull-riscv-to-apply-20211117-1
for you to fetch changes up to c94c239496256f1f1cb589825d052c2f3e26ebf6:
meson.build: Merge riscv32 and riscv64 cpu family (2021-11-17 19:18:22 +1000)
----------------------------------------------------------------
Sixth RISC-V PR for QEMU 6.2
- Fix build for riscv hosts
- Soft code alphabetically
----------------------------------------------------------------
Bin Meng (1):
target/riscv: machine: Sort the .subsections
Richard Henderson (1):
meson.build: Merge riscv32 and riscv64 cpu family
meson.build | 6 ++++
target/riscv/machine.c | 92 +++++++++++++++++++++++++-------------------------
2 files changed, 52 insertions(+), 46 deletions(-)
Applied, thanks.
r~
