On Thu, 10 Feb 2022 at 04:05, Richard Henderson <richard.hender...@linaro.org> wrote: > > This feature widens physical addresses (and intermediate physical > addresses for 2-stage translation) from 48 to 52 bits, when using > 4k or 16k pages. > > This introduces the DS bit to TCR_ELx, which is RES0 unless the > page size is enabled and supports LPA2, resulting in the effective > value of DS for a given table walk. The DS bit changes the format > of the page table descriptor slightly, moving the PS field out to > TCR so that all pages have the same sharability and repurposing > those bits of the page table descriptor for the highest bits of > the output address. > > Signed-off-by: Richard Henderson <richard.hender...@linaro.org> > ---
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org> thanks -- PMM
