Had it on my TODO list for this morning, thank you. On Mon, Feb 28, 2022 at 12:59 PM Richard Henderson < richard.hender...@linaro.org> wrote:
> On 2/28/22 00:14, Thomas Huth wrote: > > Full patch can be seen here: > > > > https://gitlab.com/thuth/qemu/-/commit/38af118ea2fef0c473 > > > > static inline void mvcrl_8(const char *dst, const char *src) > > { > > asm volatile ( > > "llill %%r0, 8\n" > > ".insn sse, 0xE50A00000000, 0(%[dst]), 0(%[src])" > > : : [dst] "d" (dst), [src] "d" (src) > > : "memory"); > > } > > Need clobber of r0 here. > > > #define Fi3(S, ASM) uint64_t S(uint64_t a, uint64_t b, uint64_t c) \ > > { \ > > uint64_t res = 0; \ > > asm ( \ > > "lg %%r2, %[a]\n" \ > > "lg %%r3, %[b]\n" \ > > "lg %%r0, %[c]\n" \ > > "ltgr %%r0, %%r0\n" \ > > ASM \ > > "stg %%r0, %[res] " \ > > : [res] "=m" (res) \ > > : [a] "m" (a), \ > > [b] "m" (b), \ > > [c] "m" (c) \ > > : "r0", "r2", \ > > "r3", "r4" \ > > ); \ > > return res; \ > > } > > > > Fi3 (_selre, ".insn rrf, 0xB9F00000, %%r0, %%r3, %%r2, 8\n") > > Fi3 (_selgrz, ".insn rrf, 0xB9E30000, %%r0, %%r3, %%r2, 8\n") > > Fi3 (_selfhrnz, ".insn rrf, 0xB9C00000, %%r0, %%r3, %%r2, 7\n") > > This isn't actively broken, but could use the same treatment as NCRK et al: > > #define Fi3(S, ASM) uint64_t S(uint64_t a, uint64_t b, uint64_t c) \ > { \ > uint64_t res; \ > asm("ltgr %[c], %[c]\n\t" ASM > : [res] "=&r" (res) > : [a] "r" (a), [b] "r" (b), [c] "r" (c) > : "cc"); > return res; > } > > Fi3(_selre, ".insn rrf, 0xB9F00000, %[res], %[a], %[b], 8") > > etc. > > > r~ >
