On 08.03.22 02:53, Richard Henderson wrote:
> From: David Miller <dmiller...@gmail.com>
>
> Signed-off-by: David Miller <dmiller...@gmail.com>
> Message-Id: <20220307020327.3003-5-dmiller...@gmail.com>
> [rth: Use new hswap and wswap tcg expanders.]
> Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
> ---
> target/s390x/tcg/translate_vx.c.inc | 84 +++++++++++++++++++++++++++++
> target/s390x/tcg/insn-data.def | 4 ++
> 2 files changed, 88 insertions(+)
>
> diff --git a/target/s390x/tcg/translate_vx.c.inc
> b/target/s390x/tcg/translate_vx.c.inc
> index a5283ef2f8..ac807122a3 100644
> --- a/target/s390x/tcg/translate_vx.c.inc
> +++ b/target/s390x/tcg/translate_vx.c.inc
> @@ -492,6 +492,46 @@ static DisasJumpType op_vlei(DisasContext *s, DisasOps
> *o)
> return DISAS_NEXT;
> }
>
> +static DisasJumpType op_vler(DisasContext *s, DisasOps *o)
> +{
> + const uint8_t es = get_field(s, m3);
TCGv_i64 t0, t1;
> +
> + if (es < ES_16 || es > ES_64) {
> + gen_program_exception(s, PGM_SPECIFICATION);
> + return DISAS_NORETURN;
> + }
> +
> + TCGv_i64 t0 = tcg_temp_new_i64();
> + TCGv_i64 t1 = tcg_temp_new_i64();
> +
> + /* Begin with the two doublewords swapped... */
> + tcg_gen_qemu_ld_i64(t1, o->addr1, get_mem_index(s), MO_TEUQ);
> + gen_addi_and_wrap_i64(s, o->addr1, o->addr1, 8);
> + tcg_gen_qemu_ld_i64(t0, o->addr1, get_mem_index(s), MO_TEUQ);
> +
> + /* ... then swap smaller elements within the doublewords as required. */
> + switch (es) {
> + case MO_16:
> + tcg_gen_hswap_i64(t1, t1);
> + tcg_gen_hswap_i64(t0, t0);
> + break;
> + case MO_32:
> + tcg_gen_wswap_i64(t1, t1);
> + tcg_gen_wswap_i64(t0, t0);
> + break;
> + case MO_64:
> + break;
> + default:
> + g_assert_not_reached();
> + }
> +
> + write_vec_element_i64(t0, get_field(s, v1), 0, ES_64);
> + write_vec_element_i64(t1, get_field(s, v1), 1, ES_64);
> + tcg_temp_free(t0);
> + tcg_temp_free(t1);
> + return DISAS_NEXT;
> +}
> +
> static DisasJumpType op_vlgv(DisasContext *s, DisasOps *o)
> {
> const uint8_t es = get_field(s, m4);
> @@ -976,6 +1016,50 @@ static DisasJumpType op_vste(DisasContext *s, DisasOps
> *o)
> return DISAS_NEXT;
> }
>
> +static DisasJumpType op_vster(DisasContext *s, DisasOps *o)
> +{
> + const uint8_t es = get_field(s, m3);
> + TCGv_i64 t0, t1;
> +
> + if (es < ES_16 || es > ES_64) {
> + gen_program_exception(s, PGM_SPECIFICATION);
> + return DISAS_NORETURN;
> + }
> +
> + /* Probe write access before actually modifying memory */
> + gen_helper_probe_write_access(cpu_env, o->addr1, tcg_constant_i64(16));
We have to free the tcg_constant_i64() IIRC.
> +
> + /* Begin with the two doublewords swapped... */
> + t0 = tcg_temp_new_i64();
> + t1 = tcg_temp_new_i64();
> + read_vec_element_i64(t1, get_field(s, v1), 0, ES_64);
> + read_vec_element_i64(t0, get_field(s, v1), 1, ES_64);
> +
apart from that LGTM
--
Thanks,
David / dhildenb
