Now that we updated all riscv machines, we can remove the temporary realize helper and the alias property.
Signed-off-by: Damien Hedde <damien.he...@greensocs.com> --- include/hw/riscv/riscv_hart.h | 3 --- hw/riscv/riscv_hart.c | 14 -------------- 2 files changed, 17 deletions(-) diff --git a/include/hw/riscv/riscv_hart.h b/include/hw/riscv/riscv_hart.h index 65ac0d2bc4..acf5ee8575 100644 --- a/include/hw/riscv/riscv_hart.h +++ b/include/hw/riscv/riscv_hart.h @@ -56,7 +56,4 @@ static inline unsigned riscv_array_get_num_harts(RISCVHartArrayState *s) return CPUS(s)->topology.cpus; } -/* Temporary function until we migrated the riscv hart array to simple device */ -void riscv_hart_array_realize(RISCVHartArrayState *state, Error **errp); - #endif diff --git a/hw/riscv/riscv_hart.c b/hw/riscv/riscv_hart.c index 1b4ff7e3c6..ea798de5d5 100644 --- a/hw/riscv/riscv_hart.c +++ b/hw/riscv/riscv_hart.c @@ -27,13 +27,6 @@ #include "hw/riscv/riscv_hart.h" #include "hw/cpu/cpus.h" -void riscv_hart_array_realize(RISCVHartArrayState *state, Error **errp) -{ - /* disable the clustering */ - cpus_disable_clustering(CPUS(state)); - qdev_realize(DEVICE(state), NULL, errp); -} - static Property riscv_harts_props[] = { DEFINE_PROP_UINT32("hartid-base", RISCVHartArrayState, hartid_base, 0), DEFINE_PROP_UINT64("resetvec", RISCVHartArrayState, resetvec, @@ -52,12 +45,6 @@ static void riscv_harts_configure_cpu(CpusState *base, CPUState *cpu, cpuenv->mhartid = s->hartid_base + i; } -static void riscv_harts_init(Object *obj) -{ - /* add a temporary property to keep num-harts */ - object_property_add_alias(obj, "num-harts", obj, "num-cpus"); -} - static void riscv_harts_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); @@ -73,7 +60,6 @@ static const TypeInfo riscv_harts_info = { .name = TYPE_RISCV_HART_ARRAY, .parent = TYPE_CPUS, .instance_size = sizeof(RISCVHartArrayState), - .instance_init = riscv_harts_init, .class_init = riscv_harts_class_init, }; -- 2.35.1