Hello Jamin,
Thanks for these new models and machine. They are queued for QEMU 7.1.
There are a couple of patchsets adding support for the AST1030 GPIO
controller and the I2C new mode that would be good extensions but
they need review first.
What are the next steps? any plans for network ? The NIC should be a
FTGMAC100 if I am correct.
Thanks,
C.
On 4/1/22 10:38, Jamin Lin wrote:
Changes from v5:
- remove TYPE_ASPEED_MINIBMC_MACHINE and ASPEED_MINIBMC_MACHINE
- remove ast1030_machine_instance_init function
Changes from v4:
- drop the ASPEED_SMC_FEATURE_WDT_CONTROL flag in hw/ssi/aspeed_smc.c
Changes from v3:
- remove AspeedMiniBmcMachineState state structure and
AspeedMiniBmcMachineClass class
- remove redundant new line in hw/arm/aspeed_ast10xx.c
- drop the ASPEED_SMC_FEATURE_WDT_CONTROL flag in hw/ssi/aspeed_smc.c
Changes from v2:
- replace aspeed_ast1030.c with aspeed_ast10xx.c for minibmc SOCs family support
- Add "ast1030-evb" machine in aspeed.c and removes aspeed_minibmc.c
Changes from v1:
The patch series supports ADC, SCU, SMC, TIMER, and WDT for AST1030 SoC.
Add avocado test case for "ast1030-evb" machine.
Test steps:
1. Download image from
https://github.com/AspeedTech-BMC/zephyr/releases/download/v00.01.04/ast1030-evb-demo.zip
2. Extract the zip file to obtain zephyr.elf
3. Run ./qemu-system-arm -M ast1030-evb -kernel $PATH/zephyr.elf -nographic
4. Test IO by Zephyr command line, commands are refer to Aspeed Zephyr
SDK User Guide below
https://github.com/AspeedTech-BMC/zephyr/releases/download/v00.01.04/Aspeed_Zephy_SDK_User_Guide_v00.01.04.pdf
- ADC(channel 0):
uart:~$ adc ADC0 resolution 10
uart:~$ adc ADC0 calibrate 1
uart:~$ adc ADC0 read_format 1
uart:~$ adc ADC0 read 0
[Result]
read: 1416mv
- SCU
uart:~$ md 7e6e2040
uart:~$ md 7e6e2080
uart:~$ md 7e6e20d0
uart:~$ md 7e6e2200
uart:~$ md 7e6e2300
uart:~$ md 7e6e25b0
[Result]
The register value should match the value of ast1030_a1_resets
in aspeed_scu.c
- Flash(fmc_cs0):
uart:~$ flash write fmc_cs0 0 0x12345678 0x87654321 0x34127856
0x78563412
uart:~$ flash read fmc_cs0 0 10
[Result]
00000000: 78 56 34 12 21 43 65 87 56 78 12 34 12 34 56 78 |xV4.!Ce.
Vx.4.4Vx|
uart:~$ flash erase fmc_cs0 0
uart:~$ flash read fmc_cs0 0 10
[Result]
00000000: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |........
........|
- Timer(TIMER0):
uart:~$ timer start TIMER0 -p 2000 -t 0
TIMER0: period 20000 ms, type 0
[Result]
timer expired after 2 seconds
- Watchdog(WDT1):
uart:~$ mw 7e785008 4755
uart:~$ mw 7e78500c 1
[Result]
soc reset after 22 seconds
Based-on: 20220315075753.8591-3-steven_...@aspeedtech.com
([v2,2/2] hw: aspeed_scu: Introduce clkin_25Mhz attribute)
Jamin Lin (2):
aspeed: Add an AST1030 eval board
test/avocado/machine_aspeed.py: Add ast1030 test case
Steven Lee (7):
aspeed/adc: Add AST1030 support
aspeed/smc: Add AST1030 support
aspeed/wdt: Fix ast2500/ast2600 default reload value
aspeed/wdt: Add AST1030 support
aspeed/timer: Add AST1030 support
aspeed/scu: Add AST1030 support
aspeed/soc : Add AST1030 support
hw/adc/aspeed_adc.c | 16 ++
hw/arm/aspeed.c | 66 +++++++
hw/arm/aspeed_ast10xx.c | 299 +++++++++++++++++++++++++++++++
hw/arm/meson.build | 6 +-
hw/misc/aspeed_scu.c | 63 +++++++
hw/ssi/aspeed_smc.c | 157 ++++++++++++++++
hw/timer/aspeed_timer.c | 17 ++
hw/watchdog/wdt_aspeed.c | 34 +++-
include/hw/adc/aspeed_adc.h | 1 +
include/hw/arm/aspeed_soc.h | 3 +
include/hw/misc/aspeed_scu.h | 25 +++
include/hw/timer/aspeed_timer.h | 1 +
include/hw/watchdog/wdt_aspeed.h | 3 +
tests/avocado/machine_aspeed.py | 36 ++++
14 files changed, 724 insertions(+), 3 deletions(-)
create mode 100644 hw/arm/aspeed_ast10xx.c
create mode 100644 tests/avocado/machine_aspeed.py
