On Sat, 9 Apr 2022 at 20:20, Richard Henderson <richard.hender...@linaro.org> wrote: > On 4/8/22 07:15, Peter Maydell wrote: > > @@ -2632,6 +2735,12 @@ static void gicv3_cpuif_el_change_hook(ARMCPU *cpu, > > void *opaque) > > GICv3CPUState *cs = opaque; > > > > gicv3_cpuif_update(cs); > > + /* > > + * Because vLPIs are only pending in NonSecure state, > > + * an EL change can change the VIRQ/VFIQ status (but > > + * cannot affect the maintenance interrupt state) > > + */ > > + gicv3_cpuif_virt_irq_fiq_update(cs); > > I'm a little bit surprised this is here, and not in arm_cpu_exec_interrupt > (or a > subroutine). Is this because if a virq has highest priority, we have to find > the highest > prio physical interrupt?
It's because if we switch from Secure to NonSecure that changes whether there's a highest-priority-virtual-LPI available (there never is for NS). This is a change from before vLPI support: when there are only list registers the calculation of the highest priority virtual interrupt doesn't care about S vs NS and thus not about the current EL. (In other words, what gicv3_cpuif_virt_irq_fiq_update() reports on the VIRQ/VFIQ lines now depends on S vs NS, so needs to be recalculated.) thanks -- PMM
