Hello, this series fixes xtensa TCG tests so that they could be built on cores with reduced configurations (e.g. missing windowed registers, no loop option, single data watchpoint register) and expands test coverage to configurations not supported earlier (e.g. MMUv3, timers at high IRQ levels).
Max Filippov (7): tests/tcg/xtensa: fix build for cores without windowed registers tests/tcg/xtensa: restore vecbase SR after test tests/tcg/xtensa: fix watchpoint test tests/tcg/xtensa: remove dependency on the loop option tests/tcg/xtensa: enable autorefill phys_mem tests for MMUv3 tests/tcg/xtensa: enable mmu tests for MMUv3 tests/tcg/xtensa: fix vectors and checks in timer test tests/tcg/xtensa/crt.S | 2 + tests/tcg/xtensa/test_break.S | 86 ++++++++------- tests/tcg/xtensa/test_mmu.S | 182 +++++++++++++++++-------------- tests/tcg/xtensa/test_phys_mem.S | 10 +- tests/tcg/xtensa/test_sr.S | 2 + tests/tcg/xtensa/test_timer.S | 68 +++++++++--- 6 files changed, 213 insertions(+), 137 deletions(-) -- 2.30.2