On Tue, 26 Apr 2022 at 17:40, Richard Henderson
<richard.hender...@linaro.org> wrote:
>
> Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
> ---
> target/arm/translate-a64.c | 24 +++++++-----------------
> 1 file changed, 7 insertions(+), 17 deletions(-)
> @@ -6052,7 +6049,7 @@ static void disas_fp_ccomp(DisasContext *s, uint32_t
> insn)
> static void disas_fp_csel(DisasContext *s, uint32_t insn)
> {
> unsigned int mos, type, rm, cond, rn, rd;
> - TCGv_i64 t_true, t_false, t_zero;
> + TCGv_i64 t_true, t_false;
> DisasCompare64 c;
> MemOp sz;
>
> @@ -6097,10 +6094,8 @@ static void disas_fp_csel(DisasContext *s, uint32_t
> insn)
> read_vec_element(s, t_false, rm, 0, sz);
>
> a64_test_cc(&c, cond);
> - t_zero = tcg_const_i64(0);
> - tcg_gen_movcond_i64(c.cond, t_true, c.value, t_zero, t_true, t_false);
> - tcg_temp_free_i64(t_zero);
> - tcg_temp_free_i64(t_false);
> + tcg_gen_movcond_i64(c.cond, t_true, c.value, tcg_constant_i64(0),
> + t_true, t_false);
> a64_free_cc(&c);
>
> /* Note that sregs & hregs write back zeros to the high bits,
This incorrectly drops the free of t_false, which isn't a
tcg_constant_*.
Otherwise
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
thanks
-- PMM
