From: Víctor Colombo <victor.colo...@eldorado.org.br>
msr_dr macro hides the usage of env->msr, which is a bad behavior
Substitute it with FIELD_EX64 calls that explicitly use env->msr
as a parameter.
Suggested-by: Richard Henderson <richard.hender...@linaro.org>
Signed-off-by: Víctor Colombo <victor.colo...@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Message-Id: <20220504210541.115256-16-victor.colo...@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb...@gmail.com>
---
target/ppc/cpu.h | 2 +-
target/ppc/helper_regs.c | 3 +--
target/ppc/mmu_common.c | 10 ++++++----
3 files changed, 8 insertions(+), 7 deletions(-)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 6cfbec26a1..cd672dec93 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -364,6 +364,7 @@ FIELD(MSR, PR, MSR_PR, 1)
FIELD(MSR, FP, MSR_FP, 1)
FIELD(MSR, ME, MSR_ME, 1)
FIELD(MSR, IR, MSR_IR, 1)
+FIELD(MSR, DR, MSR_DR, 1)
FIELD(MSR, DS, MSR_DS, 1)
FIELD(MSR, LE, MSR_LE, 1)
@@ -486,7 +487,6 @@ FIELD(MSR, LE, MSR_LE, 1)
#define msr_de ((env->msr >> MSR_DE) & 1)
#define msr_fe1 ((env->msr >> MSR_FE1) & 1)
#define msr_ep ((env->msr >> MSR_EP) & 1)
-#define msr_dr ((env->msr >> MSR_DR) & 1)
#define msr_ts ((env->msr >> MSR_TS1) & 3)
#define DBCR0_ICMP (1 << 27)
diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c
index e40078c001..b150b78182 100644
--- a/target/ppc/helper_regs.c
+++ b/target/ppc/helper_regs.c
@@ -227,8 +227,7 @@ int hreg_store_msr(CPUPPCState *env, target_ulong value,
int alter_hv)
value &= ~MSR_HVB;
value |= env->msr & MSR_HVB;
}
- if (((value ^ env->msr) & R_MSR_IR_MASK) ||
- ((value >> MSR_DR) & 1) != msr_dr) {
+ if ((value ^ env->msr) & (R_MSR_IR_MASK | R_MSR_DR_MASK)) {
cpu_interrupt_exittb(cs);
}
if ((env->mmu_model == POWERPC_MMU_BOOKE ||
diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c
index 30deca0425..89107a6af2 100644
--- a/target/ppc/mmu_common.c
+++ b/target/ppc/mmu_common.c
@@ -388,7 +388,8 @@ static int get_segment_6xx_tlb(CPUPPCState *env, mmu_ctx_t
*ctx,
" nip=" TARGET_FMT_lx " lr=" TARGET_FMT_lx
" ir=%d dr=%d pr=%d %d t=%d\n",
eaddr, (int)(eaddr >> 28), sr, env->nip, env->lr,
- (int)FIELD_EX64(env->msr, MSR, IR), (int)msr_dr, pr ? 1 : 0,
+ (int)FIELD_EX64(env->msr, MSR, IR),
+ (int)FIELD_EX64(env->msr, MSR, DR), pr ? 1 : 0,
access_type == MMU_DATA_STORE, type);
pgidx = (eaddr & ~SEGMENT_MASK_256M) >> target_page_bits;
hash = vsid ^ pgidx;
@@ -627,7 +628,8 @@ found_tlb:
/* Check the address space */
if ((access_type == MMU_INST_FETCH ?
- FIELD_EX64(env->msr, MSR, IR) : msr_dr) != (tlb->attr & 1)) {
+ FIELD_EX64(env->msr, MSR, IR) :
+ FIELD_EX64(env->msr, MSR, DR)) != (tlb->attr & 1)) {
qemu_log_mask(CPU_LOG_MMU, "%s: AS doesn't match\n", __func__);
return -1;
}
@@ -1170,8 +1172,8 @@ int get_physical_address_wtlb(CPUPPCState *env, mmu_ctx_t
*ctx,
int mmu_idx)
{
int ret = -1;
- bool real_mode = (type == ACCESS_CODE && !FIELD_EX64(env->msr, MSR, IR))
- || (type != ACCESS_CODE && msr_dr == 0);
+ bool real_mode = (type == ACCESS_CODE && !FIELD_EX64(env->msr, MSR, IR)) ||
+ (type != ACCESS_CODE && !FIELD_EX64(env->msr, MSR, DR));
switch (env->mmu_model) {
case POWERPC_MMU_SOFT_6xx:
--
2.32.0
