On Tue, May 3, 2022 at 10:27 AM ~eopxd <eo...@git.sr.ht> wrote: > > From: eopXD <eop.c...@sifive.com> > > Signed-off-by: eop Chen <eop.c...@sifive.com> > Reviewed-by: Frank Chang <frank.ch...@sifive.com> > Reviewed-by: Weiwei Li <liwei...@iscas.ac.cn>
Acked-by: Alistair Francis <alistair.fran...@wdc.com> Alistair > --- > target/riscv/insn_trans/trans_rvv.c.inc | 44 +++++++++++++++++++++++++ > target/riscv/vector_helper.c | 20 +++++++++++ > 2 files changed, 64 insertions(+) > > diff --git a/target/riscv/insn_trans/trans_rvv.c.inc > b/target/riscv/insn_trans/trans_rvv.c.inc > index 430847b0f9..46ee673040 100644 > --- a/target/riscv/insn_trans/trans_rvv.c.inc > +++ b/target/riscv/insn_trans/trans_rvv.c.inc > @@ -2123,11 +2123,22 @@ static bool trans_vmv_v_v(DisasContext *s, > arg_vmv_v_v *a) > /* vmv.v.v has rs2 = 0 and vm = 1 */ > vext_check_sss(s, a->rd, a->rs1, 0, 1)) { > if (s->vl_eq_vlmax) { > + if (s->vta && s->lmul < 0) { > + /* > + * tail elements may pass vlmax when lmul < 0 > + * set tail elements to 1s > + */ > + uint32_t vlenb = s->cfg_ptr->vlen >> 3; > + tcg_gen_gvec_ori(s->sew, vreg_ofs(s, a->rd), > + vreg_ofs(s, a->rd), -1, > + vlenb, vlenb); > + } > tcg_gen_gvec_mov(s->sew, vreg_ofs(s, a->rd), > vreg_ofs(s, a->rs1), > MAXSZ(s), MAXSZ(s)); > } else { > uint32_t data = FIELD_DP32(0, VDATA, LMUL, s->lmul); > + data = FIELD_DP32(data, VDATA, VTA, s->vta); > static gen_helper_gvec_2_ptr * const fns[4] = { > gen_helper_vmv_v_v_b, gen_helper_vmv_v_v_h, > gen_helper_vmv_v_v_w, gen_helper_vmv_v_v_d, > @@ -2163,6 +2174,16 @@ static bool trans_vmv_v_x(DisasContext *s, arg_vmv_v_x > *a) > s1 = get_gpr(s, a->rs1, EXT_SIGN); > > if (s->vl_eq_vlmax) { > + if (s->vta && s->lmul < 0) { > + /* > + * tail elements may pass vlmax when lmul < 0 > + * set tail elements to 1s > + */ > + uint32_t vlenb = s->cfg_ptr->vlen >> 3; > + tcg_gen_gvec_ori(s->sew, vreg_ofs(s, a->rd), > + vreg_ofs(s, a->rd), -1, > + vlenb, vlenb); > + } > tcg_gen_gvec_dup_tl(s->sew, vreg_ofs(s, a->rd), > MAXSZ(s), MAXSZ(s), s1); > } else { > @@ -2170,6 +2191,7 @@ static bool trans_vmv_v_x(DisasContext *s, arg_vmv_v_x > *a) > TCGv_i64 s1_i64 = tcg_temp_new_i64(); > TCGv_ptr dest = tcg_temp_new_ptr(); > uint32_t data = FIELD_DP32(0, VDATA, LMUL, s->lmul); > + data = FIELD_DP32(data, VDATA, VTA, s->vta); > static gen_helper_vmv_vx * const fns[4] = { > gen_helper_vmv_v_x_b, gen_helper_vmv_v_x_h, > gen_helper_vmv_v_x_w, gen_helper_vmv_v_x_d, > @@ -2200,6 +2222,16 @@ static bool trans_vmv_v_i(DisasContext *s, arg_vmv_v_i > *a) > vext_check_ss(s, a->rd, 0, 1)) { > int64_t simm = sextract64(a->rs1, 0, 5); > if (s->vl_eq_vlmax) { > + if (s->vta && s->lmul < 0) { > + /* > + * tail elements may pass vlmax when lmul < 0 > + * set tail elements to 1s > + */ > + uint32_t vlenb = s->cfg_ptr->vlen >> 3; > + tcg_gen_gvec_ori(s->sew, vreg_ofs(s, a->rd), > + vreg_ofs(s, a->rd), -1, > + vlenb, vlenb); > + } > tcg_gen_gvec_dup_imm(s->sew, vreg_ofs(s, a->rd), > MAXSZ(s), MAXSZ(s), simm); > mark_vs_dirty(s); > @@ -2208,6 +2240,7 @@ static bool trans_vmv_v_i(DisasContext *s, arg_vmv_v_i > *a) > TCGv_i64 s1; > TCGv_ptr dest; > uint32_t data = FIELD_DP32(0, VDATA, LMUL, s->lmul); > + data = FIELD_DP32(data, VDATA, VTA, s->vta); > static gen_helper_vmv_vx * const fns[4] = { > gen_helper_vmv_v_x_b, gen_helper_vmv_v_x_h, > gen_helper_vmv_v_x_w, gen_helper_vmv_v_x_d, > @@ -2780,6 +2813,16 @@ static bool trans_vfmv_v_f(DisasContext *s, > arg_vfmv_v_f *a) > TCGv_i64 t1; > > if (s->vl_eq_vlmax) { > + if (s->vta && s->lmul < 0) { > + /* > + * tail elements may pass vlmax when lmul < 0 > + * set tail elements to 1s > + */ > + uint32_t vlenb = s->cfg_ptr->vlen >> 3; > + tcg_gen_gvec_ori(s->sew, vreg_ofs(s, a->rd), > + vreg_ofs(s, a->rd), -1, > + vlenb, vlenb); > + } > t1 = tcg_temp_new_i64(); > /* NaN-box f[rs1] */ > do_nanbox(s, t1, cpu_fpr[a->rs1]); > @@ -2791,6 +2834,7 @@ static bool trans_vfmv_v_f(DisasContext *s, > arg_vfmv_v_f *a) > TCGv_ptr dest; > TCGv_i32 desc; > uint32_t data = FIELD_DP32(0, VDATA, LMUL, s->lmul); > + data = FIELD_DP32(data, VDATA, VTA, s->vta); > static gen_helper_vmv_vx * const fns[3] = { > gen_helper_vmv_v_x_h, > gen_helper_vmv_v_x_w, > diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c > index ddaf364573..87faf1770b 100644 > --- a/target/riscv/vector_helper.c > +++ b/target/riscv/vector_helper.c > @@ -1971,6 +1971,9 @@ void HELPER(NAME)(void *vd, void *vs1, CPURISCVState > *env, \ > uint32_t desc) \ > { \ > uint32_t vl = env->vl; \ > + uint32_t esz = sizeof(ETYPE); \ > + uint32_t total_elems = vext_get_total_elems(env, desc, esz); \ > + uint32_t vta = vext_vta(desc); \ > uint32_t i; \ > \ > for (i = env->vstart; i < vl; i++) { \ > @@ -1978,6 +1981,8 @@ void HELPER(NAME)(void *vd, void *vs1, CPURISCVState > *env, \ > *((ETYPE *)vd + H(i)) = s1; \ > } \ > env->vstart = 0; \ > + /* set tail elements to 1s */ \ > + vext_set_elems_1s(vd, vta, vl * esz, total_elems * esz); \ > } > > GEN_VEXT_VMV_VV(vmv_v_v_b, int8_t, H1) > @@ -1990,12 +1995,17 @@ void HELPER(NAME)(void *vd, uint64_t s1, > CPURISCVState *env, \ > uint32_t desc) \ > { \ > uint32_t vl = env->vl; \ > + uint32_t esz = sizeof(ETYPE); \ > + uint32_t total_elems = vext_get_total_elems(env, desc, esz); \ > + uint32_t vta = vext_vta(desc); \ > uint32_t i; \ > \ > for (i = env->vstart; i < vl; i++) { \ > *((ETYPE *)vd + H(i)) = (ETYPE)s1; \ > } \ > env->vstart = 0; \ > + /* set tail elements to 1s */ \ > + vext_set_elems_1s(vd, vta, vl * esz, total_elems * esz); \ > } > > GEN_VEXT_VMV_VX(vmv_v_x_b, int8_t, H1) > @@ -2008,6 +2018,9 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, void > *vs2, \ > CPURISCVState *env, uint32_t desc) \ > { \ > uint32_t vl = env->vl; \ > + uint32_t esz = sizeof(ETYPE); \ > + uint32_t total_elems = vext_get_total_elems(env, desc, esz); \ > + uint32_t vta = vext_vta(desc); \ > uint32_t i; \ > \ > for (i = env->vstart; i < vl; i++) { \ > @@ -2015,6 +2028,8 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, void > *vs2, \ > *((ETYPE *)vd + H(i)) = *(vt + H(i)); \ > } \ > env->vstart = 0; \ > + /* set tail elements to 1s */ \ > + vext_set_elems_1s(vd, vta, vl * esz, total_elems * esz); \ > } > > GEN_VEXT_VMERGE_VV(vmerge_vvm_b, int8_t, H1) > @@ -2027,6 +2042,9 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong s1, > \ > void *vs2, CPURISCVState *env, uint32_t desc) \ > { \ > uint32_t vl = env->vl; \ > + uint32_t esz = sizeof(ETYPE); \ > + uint32_t total_elems = vext_get_total_elems(env, desc, esz); \ > + uint32_t vta = vext_vta(desc); \ > uint32_t i; \ > \ > for (i = env->vstart; i < vl; i++) { \ > @@ -2036,6 +2054,8 @@ void HELPER(NAME)(void *vd, void *v0, target_ulong s1, > \ > *((ETYPE *)vd + H(i)) = d; \ > } \ > env->vstart = 0; \ > + /* set tail elements to 1s */ \ > + vext_set_elems_1s(vd, vta, vl * esz, total_elems * esz); \ > } > > GEN_VEXT_VMERGE_VX(vmerge_vxm_b, int8_t, H1) > -- > 2.34.2 > >