Hello, There is two issues related to RISC-V ISA extension string I want to be fixed before QEMU 7.1 release.
This is PATCH v2. For details, see cover letter of PATCH v1. <https://lists.gnu.org/archive/html/qemu-devel/2022-04/msg03817.html> PATCH v1 -> PATCH v2: I decided to "move" Zhinx*, not to remove them tentativelly. Because, although I disagree with Weiwei's opinion (on canonical ordering, Z* multi-letter extensions are ordered by second character; that should reflect closely related single-letter extension but that didn't happened on Zhinx*), ordering of "H" is reviewed and going to be right after "V". I considered this is safe enough (despite its "unratified" status): 1. Zhinx and Zhinxmin are minor extensions 2. Extension ordering is going to be not that important in the future (by upcoming rules) but we have reasons to make extension ordering canonical as possible for toolchain compatibility (for now). Tsukasa OI (2): target/riscv: Move Zhinx* extensions on ISA string target/riscv: Add short-isa-string option target/riscv/cpu.c | 9 ++++++--- target/riscv/cpu.h | 2 ++ 2 files changed, 8 insertions(+), 3 deletions(-) base-commit: 178bacb66d98d9ee7a702b9f2a4dfcd88b72a9ab -- 2.34.1
