On Tue, 17 May 2022 at 06:59, Richard Henderson <richard.hender...@linaro.org> wrote: > > The bitmap need only hold 15 bits; bitmap is over-complicated. > We can simplify operations quite a bit with plain logical ops. > > The introduction of SVE_VQ_POW2_MAP eliminates the need for > looping in order to search for powers of two. Simply perform > the logical ops and use count leading or trailing zeros as > required to find the result. > > Signed-off-by: Richard Henderson <richard.hender...@linaro.org> > ---
> static void cpu_max_get_sve_max_vq(Object *obj, Visitor *v, const char *name, > @@ -576,7 +576,7 @@ static void cpu_arm_get_sve_vq(Object *obj, Visitor *v, > const char *name, > if (!cpu_isar_feature(aa64_sve, cpu)) { > value = false; > } else { > - value = test_bit(vq - 1, cpu->sve_vq_map); > + value = (cpu->sve_vq_map >> (vq - 1)) & 1; Use extract32() here, since you use deposit32() in the _set_ function? > @@ -998,12 +994,11 @@ static void aarch64_a64fx_initfn(Object *obj) > cpu->gic_vpribits = 5; > cpu->gic_vprebits = 5; > > - /* Suppport of A64FX's vector length are 128,256 and 512bit only */ > + /* Suppport of A64FX's vector length are 128, 256 and 512bit only */ If we're going to tweak this comment text we might as well fix all of the typo/grammar nits: /* The A64FX supports only 128, 256 and 512 bit vector lengths */ > aarch64_add_sve_properties(obj); > - bitmap_zero(cpu->sve_vq_supported, ARM_MAX_VQ); > - set_bit(0, cpu->sve_vq_supported); /* 128bit */ > - set_bit(1, cpu->sve_vq_supported); /* 256bit */ > - set_bit(3, cpu->sve_vq_supported); /* 512bit */ > + cpu->sve_vq_supported = (1 << 0) /* 128bit */ > + | (1 << 1) /* 256bit */ > + | (1 << 3); /* 512bit */ Otherwise Reviewed-by: Peter Maydell <peter.mayd...@linaro.org> thanks -- PMM