On 5/30/22 09:05, Peter Maydell wrote:
Massive pullreq but almost all of that is RTH's SVE
refactoring patchset. The other interesting thing here is
the fix for compiling on aarch64 macos.

thanks
-- PMM

The following changes since commit f7a1ea403e0282a7f57edd4298c4f65f24165da5:

   Merge tag 'misc-pull-request' of gitlab.com:marcandre.lureau/qemu into 
staging (2022-05-29 16:34:56 -0700)

are available in the Git repository at:

   https://git.linaro.org/people/pmaydell/qemu-arm.git 
tags/pull-target-arm-20220530

for you to fetch changes up to b1071174d2a2ab371082b7d4b5f19e98edc61ac6:

   target/arm: Remove aa64_sve check from before disas_sve (2022-05-30 17:05:12 
+0100)

----------------------------------------------------------------
target-arm queue:
  * docs/system/arm: Add FEAT_HCX to list of emulated features
  * target/arm/hvf: Include missing "cpregs.h"
  * hw/sd/allwinner-sdhost: report FIFO water level as 1 when data ready
  * SVE: refactor to use TRANS/TRANS_FEAT macros and push
    SVE feature check down to individual insn level

Applied, thanks.  Please update https://wiki.qemu.org/ChangeLog/7.1 as 
appropriate.


r~



----------------------------------------------------------------
Icenowy Zheng (1):
       hw/sd/allwinner-sdhost: report FIFO water level as 1 when data ready

Peter Maydell (1):
       docs/system/arm: Add FEAT_HCX to list of emulated features

Philippe Mathieu-Daudé (1):
       target/arm/hvf: Include missing "cpregs.h"

Richard Henderson (114):
       target/arm: Introduce TRANS, TRANS_FEAT
       target/arm: Move null function and sve check into gen_gvec_ool_zz
       target/arm: Use TRANS_FEAT for gen_gvec_ool_zz
       target/arm: Move null function and sve check into gen_gvec_ool_zzz
       target/arm: Introduce gen_gvec_ool_arg_zzz
       target/arm: Use TRANS_FEAT for gen_gvec_ool_arg_zzz
       target/arm: Use TRANS_FEAT for do_sve2_zzz_ool
       target/arm: Move null function and sve check into gen_gvec_ool_zzzz
       target/arm: Use TRANS_FEAT for gen_gvec_ool_zzzz
       target/arm: Introduce gen_gvec_ool_arg_zzzz
       target/arm: Use TRANS_FEAT for do_sve2_zzzz_ool
       target/arm: Use TRANS_FEAT for gen_gvec_ool_arg_zzzz
       target/arm: Rename do_zzxz_ool to gen_gvec_ool_arg_zzxz
       target/arm: Use TRANS_FEAT for gen_gvec_ool_arg_zzxz
       target/arm: Use TRANS_FEAT for do_sve2_zzz_data
       target/arm: Use TRANS_FEAT for do_sve2_zzzz_data
       target/arm: Use TRANS_FEAT for do_sve2_zzw_data
       target/arm: Use TRANS_FEAT for USDOT_zzzz
       target/arm: Move null function and sve check into gen_gvec_ool_zzp
       target/arm: Introduce gen_gvec_ool_arg_zpz
       target/arm: Use TRANS_FEAT for gen_gvec_ool_arg_zpz
       target/arm: Use TRANS_FEAT for do_sve2_zpz_data
       target/arm: Rename do_zpzi_ool to gen_gvec_ool_arg_zpzi
       target/arm: Use TRANS_FEAT for gen_gvec_ool_arg_zpzi
       target/arm: Move null function and sve check into gen_gvec_ool_zzzp
       target/arm: Introduce gen_gvec_ool_arg_zpzz
       target/arm: Use TRANS_FEAT for gen_gvec_ool_arg_zpzz
       target/arm: Use TRANS_FEAT for do_sve2_zpzz_ool
       target/arm: Merge gen_gvec_fn_zz into do_mov_z
       target/arm: Move null function and sve check into gen_gvec_fn_zzz
       target/arm: Rename do_zzz_fn to gen_gvec_fn_arg_zzz
       target/arm: More use of gen_gvec_fn_arg_zzz
       target/arm: Use TRANS_FEAT for gen_gvec_fn_arg_zzz
       target/arm: Use TRANS_FEAT for do_sve2_fn_zzz
       target/arm: Use TRANS_FEAT for RAX1
       target/arm: Introduce gen_gvec_fn_arg_zzzz
       target/arm: Use TRANS_FEAT for do_sve2_zzzz_fn
       target/arm: Introduce gen_gvec_fn_zzi
       target/arm: Use TRANS_FEAT for do_zz_dbm
       target/arm: Hoist sve access check through do_sel_z
       target/arm: Introduce gen_gvec_fn_arg_zzi
       target/arm: Use TRANS_FEAT for do_sve2_fn2i
       target/arm: Use TRANS_FEAT for do_vpz_ool
       target/arm: Use TRANS_FEAT for do_shift_imm
       target/arm: Introduce do_shift_zpzi
       target/arm: Use TRANS_FEAT for do_shift_zpzi
       target/arm: Use TRANS_FEAT for do_zpzzz_ool
       target/arm: Move sve check into do_index
       target/arm: Use TRANS_FEAT for do_index
       target/arm: Use TRANS_FEAT for do_adr
       target/arm: Use TRANS_FEAT for do_predset
       target/arm: Use TRANS_FEAT for RDFFR, WRFFR
       target/arm: Use TRANS_FEAT for do_pfirst_pnext
       target/arm: Use TRANS_FEAT for do_EXT
       target/arm: Use TRANS_FEAT for do_perm_pred3
       target/arm: Use TRANS_FEAT for do_perm_pred2
       target/arm: Move sve zip high_ofs into simd_data
       target/arm: Use gen_gvec_ool_arg_zzz for do_zip, do_zip_q
       target/arm: Use TRANS_FEAT for do_zip, do_zip_q
       target/arm: Use TRANS_FEAT for do_clast_vector
       target/arm: Use TRANS_FEAT for do_clast_fp
       target/arm: Use TRANS_FEAT for do_clast_general
       target/arm: Use TRANS_FEAT for do_last_fp
       target/arm: Use TRANS_FEAT for do_last_general
       target/arm: Use TRANS_FEAT for SPLICE
       target/arm: Use TRANS_FEAT for do_ppzz_flags
       target/arm: Use TRANS_FEAT for do_sve2_ppzz_flags
       target/arm: Use TRANS_FEAT for do_ppzi_flags
       target/arm: Use TRANS_FEAT for do_brk2, do_brk3
       target/arm: Use TRANS_FEAT for MUL_zzi
       target/arm: Reject dup_i w/ shifted byte early
       target/arm: Reject add/sub w/ shifted byte early
       target/arm: Reject copy w/ shifted byte early
       target/arm: Use TRANS_FEAT for ADD_zzi
       target/arm: Use TRANS_FEAT for do_zzi_sat
       target/arm: Use TRANS_FEAT for do_zzi_ool
       target/arm: Introduce gen_gvec_{ptr,fpst}_zzzz
       target/arm: Use TRANS_FEAT for FMMLA
       target/arm: Move sve check into gen_gvec_fn_ppp
       target/arm: Implement NOT (prediates) alias
       target/arm: Use TRANS_FEAT for SEL_zpzz
       target/arm: Use TRANS_FEAT for MOVPRFX
       target/arm: Use TRANS_FEAT for FMLA
       target/arm: Use TRANS_FEAT for BFMLA
       target/arm: Rename do_zzz_fp to gen_gvec_ool_fpst_arg_zzz
       target/arm: Use TRANS_FEAT for DO_FP3
       target/arm: Use TRANS_FEAT for FMUL_zzx
       target/arm: Use TRANS_FEAT for FTMAD
       target/arm: Move null function and sve check into do_reduce
       target/arm: Use TRANS_FEAT for do_reduce
       target/arm: Use TRANS_FEAT for FRECPE, FRSQRTE
       target/arm: Expand frint_fns for MO_8
       target/arm: Rename do_zpz_ptr to gen_gvec_ool_fpst_arg_zpz
       target/arm: Move null function and sve check into do_frint_mode
       target/arm: Use TRANS_FEAT for do_frint_mode
       target/arm: Use TRANS_FEAT for FLOGB
       target/arm: Use TRANS_FEAT for do_ppz_fp
       target/arm: Rename do_zpzz_ptr to gen_gvec_fpst_arg_zpzz
       target/arm: Use TRANS_FEAT for gen_gvec_fpst_arg_zpzz
       target/arm: Use TRANS_FEAT for FCADD
       target/arm: Introduce gen_gvec_fpst_zzzzp
       target/arm: Use TRANS_FEAT for gen_gvec_fpst_zzzzp
       target/arm: Move null function and sve check into do_fp_imm
       target/arm: Use TRANS_FEAT for DO_FP_IMM
       target/arm: Use TRANS_FEAT for DO_FPCMP
       target/arm: Remove assert in trans_FCMLA_zzxz
       target/arm: Use TRANS_FEAT for FCMLA_zzxz
       target/arm: Use TRANS_FEAT for do_narrow_extract
       target/arm: Use TRANS_FEAT for do_shll_tb
       target/arm: Use TRANS_FEAT for do_shr_narrow
       target/arm: Use TRANS_FEAT for do_FMLAL_zzzw
       target/arm: Use TRANS_FEAT for do_FMLAL_zzxw
       target/arm: Add sve feature check for remaining trans_* functions
       target/arm: Remove aa64_sve check from before disas_sve

  docs/system/arm/emulation.rst |    1 +
  target/arm/translate.h        |   11 +
  target/arm/sve.decode         |   57 +-
  hw/sd/allwinner-sdhost.c      |    7 +
  target/arm/hvf/hvf.c          |    1 +
  target/arm/sve_helper.c       |    6 +-
  target/arm/translate-a64.c    |    2 +-
  target/arm/translate-sve.c    | 5367 +++++++++++++++--------------------------
  8 files changed, 2067 insertions(+), 3385 deletions(-)



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