Adjust RW, fixing #1062, and adjusting bits [4:2]. r~
Richard Henderson (2): target/arm: SCR_EL3 bits 4,5 are always res0 target/arm: SCR_EL3.RW is RAO/WI without AArch32 EL[12] target/arm/cpu.h | 5 +++++ target/arm/helper.c | 11 ++++++----- 2 files changed, 11 insertions(+), 5 deletions(-) -- 2.34.1
