malc wrote: > > Inefficient in what way? The generated code only grows by a single > > unconditional branch. > > The generated code grows by a memory write
Yes, an additional store instruction is generated, but the number of store instructions *executed* does not change. The original code already does a store in both the compare-equal and the compare-unequal case, by branching to the same store instruction; with my patch, a store is still done in both cases, but the store instruction executed is a separate one in each. > (which is not what the hardware does). The hardware does an atomic read-modify-write; qemu emulates this as a separate read and write, and like the hardware, always does the write part whether or not the "modify" part actually modified the data. My patch does *not* change this in any way. > I recall having discussion aboutit with Fabrcie (in private) and i > blieve (and if my memory serves me) we came to the conclusion that > there's a way forward w.r.t. to this issue i just never came around of > implementing it, i can try to dig out the old mails and share the > highlights with you if you are interested. Yes, please. -- Andreas Gustafsson, g...@gson.org
