According RVV spec 1.0, the minmal requirement of VLEN is great than or equal to ELEN, and minmal possible ELEN is 32, and also spec has mention `Minimum VLEN` for zve32* is 32, so the lower bound of VLEN is 32 I think.
[1] https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#2-implementation-defined-constant-parameters [2] https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#182-zve-vector-extensions-for-embedded-processors Signed-off-by: Kito Cheng <kito.ch...@sifive.com> --- target/riscv/cpu.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 1bb3973806..487d0faa63 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -740,10 +740,10 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp) "Vector extension VLEN must be power of 2"); return; } - if (cpu->cfg.vlen > RV_VLEN_MAX || cpu->cfg.vlen < 128) { + if (cpu->cfg.vlen > RV_VLEN_MAX || cpu->cfg.vlen < 32) { error_setg(errp, "Vector extension implementation only supports VLEN " - "in the range [128, %d]", RV_VLEN_MAX); + "in the range [32, %d]", RV_VLEN_MAX); return; } if (!is_power_of_2(cpu->cfg.elen)) { @@ -757,6 +757,12 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp) "in the range [8, 64]"); return; } + if (cpu->cfg.vlen < cpu->cfg.elen) { + error_setg(errp, + "Vector extension VLEN must be greater than or equal " + "to ELEN"); + return; + } if (cpu->cfg.vext_spec) { if (!g_strcmp0(cpu->cfg.vext_spec, "v1.0")) { vext_version = VEXT_VERSION_1_00_0; -- 2.34.0