On Fri, Jul 29, 2022 at 03:25:55PM +0200, Cédric Le Goater wrote: > Hello Iris, > > On 7/29/22 01:23, Iris Chen wrote:
> > MOSI pin in spi_gpio: the mosi pin is not included and we poll the realtime > > value > > of the gpio for input bits to prevent bugs with caching the mosi value. It > > was discovered > > during testing that when using the mosi pin as the input pin, the mosi > > value was not > > being updated due to a kernel and aspeed_gpio model optimization. > > ah. We need help from Andrew ! the model should have a mosi pin . This discussion about SMC reminded me of something that might be leading to the issues we're seeing. Our hardware implementation uses the same GPIOs as one of the SMCs and doesn't use the SMC. It could be that both QEMU models (the SPI-GPIO and the SMC) are trying to grab the same GPIOs. -- Patrick Williams
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