On Sun, Aug 14, 2022 at 3:04 PM Alistair Francis <alistai...@gmail.com> wrote: > > On Sat, Aug 13, 2022 at 8:20 PM Peter Maydell <peter.mayd...@linaro.org> > wrote: > > > > On Sat, 13 Aug 2022 at 01:53, Furquan Shaikh <furq...@rivosinc.com> wrote: > > > I ran into a problem when I was testing a project (with a microkernel > > > in M-mode and tasks in U-mode) that uses semihosting for debugging. > > > The semihosting worked fine for M-mode but not in U-mode. As I started > > > digging into this, I realized that this is because qemu restricts > > > semihosting to only M and S modes. > > > > Right. We should fix this by having a generic works-for-all-architectures > > semihosting config knob, because this is not a riscv specific problem, > > and we already have issues with different target architectures > > developing their own solutions to things. > > I agree with Peter here. I don't see a strong use case for a RISC-V > specific fine grained control. A user can either enable/disable > semihosting for privilege or usermodes (with Peter's patchset). That > seems like enough configuration options, it is unlikely that someone > will need semihosting only available to S-mode for example.
Sounds good. Thanks for the feedback. I can continue with the changes that Peter has. > > Alistair > > > > > I'll see if I can dig out the half-done patchset I had for this. Let me know if you want to collaborate on this to get this to completion. Thanks! > > > > thanks > > -- PMM > >