Remove the do_init parameter of ppc440_sdram_init and enable SDRAM controller from the board via DCR access instead. Firmware does this so it may not be needed when booting firmware only with -kernel but we enable it unconditionally to preserve previous behaviour.
Signed-off-by: BALATON Zoltan <bala...@eik.bme.hu> --- v2: replace 0x08000000 with BIT(27) hw/ppc/ppc440.h | 3 +-- hw/ppc/ppc440_uc.c | 8 ++------ hw/ppc/sam460ex.c | 8 +++++++- 3 files changed, 10 insertions(+), 9 deletions(-) diff --git a/hw/ppc/ppc440.h b/hw/ppc/ppc440.h index e6c905b7d6..01d76b8000 100644 --- a/hw/ppc/ppc440.h +++ b/hw/ppc/ppc440.h @@ -17,8 +17,7 @@ void ppc4xx_l2sram_init(CPUPPCState *env); void ppc4xx_cpr_init(CPUPPCState *env); void ppc4xx_sdr_init(CPUPPCState *env); void ppc440_sdram_init(CPUPPCState *env, int nbanks, - Ppc4xxSdramBank *ram_banks, - int do_init); + Ppc4xxSdramBank *ram_banks); void ppc4xx_ahb_init(CPUPPCState *env); void ppc4xx_dma_init(CPUPPCState *env, int dcr_base); void ppc460ex_pcie_init(CPUPPCState *env); diff --git a/hw/ppc/ppc440_uc.c b/hw/ppc/ppc440_uc.c index 3c442eaecc..b3f56c49b5 100644 --- a/hw/ppc/ppc440_uc.c +++ b/hw/ppc/ppc440_uc.c @@ -723,12 +723,11 @@ static void sdram_reset(void *opaque) ppc440_sdram_t *sdram = opaque; sdram->addr = 0; - sdram->mcopt2 = BIT(27); + sdram->mcopt2 = 0; } void ppc440_sdram_init(CPUPPCState *env, int nbanks, - Ppc4xxSdramBank *ram_banks, - int do_init) + Ppc4xxSdramBank *ram_banks) { ppc440_sdram_t *sdram; int i; @@ -745,9 +744,6 @@ void ppc440_sdram_init(CPUPPCState *env, int nbanks, sdram, &dcr_read_sdram, &dcr_write_sdram); ppc_dcr_register(env, SDRAM0_CFGDATA, sdram, &dcr_read_sdram, &dcr_write_sdram); - if (do_init) { - sdram_map_bcr(sdram); - } ppc_dcr_register(env, SDRAM_R0BAS, sdram, &dcr_read_sdram, &dcr_write_sdram); diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c index f4c2a693fb..dac329d482 100644 --- a/hw/ppc/sam460ex.c +++ b/hw/ppc/sam460ex.c @@ -345,7 +345,13 @@ static void sam460ex_init(MachineState *machine) ppc4xx_sdram_banks(machine->ram, 1, ram_banks, ppc460ex_sdram_bank_sizes); /* FIXME: does 460EX have ECC interrupts? */ - ppc440_sdram_init(env, 1, ram_banks, 1); + ppc440_sdram_init(env, 1, ram_banks); + /* Enable SDRAM memory regions as we may boot without firmware */ + if (ppc_dcr_write(env->dcr_env, SDRAM0_CFGADDR, 0x21) || + ppc_dcr_write(env->dcr_env, SDRAM0_CFGDATA, 0x08000000)) { + error_report("Couldn't enable memory regions"); + exit(1); + } /* IIC controllers and devices */ dev = sysbus_create_simple(TYPE_PPC4xx_I2C, 0x4ef600700, -- 2.30.4