[AMD Official Use Only - General] Hi Paul and AFAIK:
Thanks for your help. When could we see this patch on the master branch? 😊 Our project urgently needs this solution. Thanks! Ruili -----Original Message----- From: Paul Durrant Subject: RE: [PATCH] hw/xen: set pci Atomic Ops requests for passthrough device On 14/09/2022 03:07, Ji, Ruili wrote: [AMD Official Use Only - General] Hi Paul, Thank you! But how could we merge this patch ? AFAIK Anthony (anthony.per...@citrix.com) still deals with this. Cheers, Paul -----Original Message----- From: Ji, Ruili Sent: 2022年9月14日 18:08 To: Paul Durrant <xadimg...@gmail.com>; qemu-devel@nongnu.org Cc: Liu, Aaron <aaron....@amd.com>; xen-de...@lists.xenproject.org Subject: RE: [PATCH] hw/xen: set pci Atomic Ops requests for passthrough device Hi Paul, Thank you! But how could we merge this patch ? Ruili -----Original Message----- From: Paul Durrant <xadimg...@gmail.com> Sent: 2022年9月14日 17:08 To: Ji, Ruili <ruili...@amd.com>; qemu-devel@nongnu.org Cc: Liu, Aaron <aaron....@amd.com>; xen-de...@lists.xenproject.org Subject: Re: [PATCH] hw/xen: set pci Atomic Ops requests for passthrough device Caution: This message originated from an External Source. Use proper caution when opening attachments, clicking links, or responding. On 13/09/2022 04:02, Ji, Ruili wrote: > [AMD Official Use Only - General] > > > Hi Paul, > > Could you help to review this patch? > LGTM. You can add my R-b to it. Paul > Thanks > > *From:* Ji, Ruili > *Sent:* 2022年9月7日 9:04 > *To:* 'Paul Durrant' <p...@xen.org>; 'qemu-devel@nongnu.org' > <qemu-devel@nongnu.org> > *Cc:* Liu, Aaron <aaron....@amd.com>; 'xen-de...@lists.xenproject.org' > <xen-de...@lists.xenproject.org> > *Subject:* RE: [PATCH] hw/xen: set pci Atomic Ops requests for > passthrough device > > FYI > > *From:* Ji, Ruili > *Sent:* 2022年9月6日 15:40 > *To:* qemu-devel@nongnu.org <mailto:qemu-devel@nongnu.org> > *Cc:* Liu, Aaron <aaron....@amd.com <mailto:aaron....@amd.com>> > *Subject:* [PATCH] hw/xen: set pci Atomic Ops requests for passthrough > device > > From c54e0714a1e1cac7dc416bd843b9ec7162bcfc47 Mon Sep 17 00:00:00 > 2001 > > From: Ruili Ji ruili...@amd.com <mailto:ruili...@amd.com> > > Date: Tue, 6 Sep 2022 14:09:41 +0800 > > Subject: [PATCH] hw/xen: set pci Atomic Ops requests for passthrough > device > > Make guest os access pci device control 2 reg for passthrough device > > as struct XenPTRegInfo described in the file hw/xen/xen_pt.h. > > /* reg read only field mask (ON:RO/ROS, OFF:other) */ > > uint32_t ro_mask; > > /* reg emulate field mask (ON:emu, OFF:passthrough) */ > > uint32_t emu_mask; > > Resolves: > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgitl > ab.com%2Fqemu-project%2Fqemu%2F-%2Fissues%2F1196&data=05%7C01%7CRu > ili.Ji%40amd.com%7Ca5e2c22a81544feb6bb408da96309702%7C3dd8961fe4884e60 > 8e11a82d994e183d%7C0%7C0%7C637987432689748212%7CUnknown%7CTWFpbGZsb3d8 > eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3 > 000%7C%7C%7C&sdata=Jg8588FWkIZzmSEyt50TYCbck2NuoVJdm7ZP0Z%2FtFGc%3 > D&reserved=0 > <https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgit > lab.com%2Fqemu-project%2Fqemu%2F-%2Fissues%2F1196&data=05%7C01%7CR > uili.Ji%40amd.com%7Ca5e2c22a81544feb6bb408da96309702%7C3dd8961fe4884e6 > 08e11a82d994e183d%7C0%7C0%7C637987432689748212%7CUnknown%7CTWFpbGZsb3d > 8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C > 3000%7C%7C%7C&sdata=Jg8588FWkIZzmSEyt50TYCbck2NuoVJdm7ZP0Z%2FtFGc% > 3D&reserved=0> > > Signed-off-by: aaron....@amd.com <mailto:aaron....@amd.com> > > Signed-off-by: ruili...@amd.com <mailto:ruili...@amd.com> > > --- > > hw/xen/xen_pt_config_init.c | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/hw/xen/xen_pt_config_init.c b/hw/xen/xen_pt_config_init.c > > index c5c4e943a8..adc565a00a 100644 > > --- a/hw/xen/xen_pt_config_init.c > > +++ b/hw/xen/xen_pt_config_init.c > > @@ -985,8 +985,8 @@ static XenPTRegInfo xen_pt_emu_reg_pcie[] = { > > .offset = 0x28, > > .size = 2, > > .init_val = 0x0000, > > - .ro_mask = 0xFFE0, > > - .emu_mask = 0xFFFF, > > + .ro_mask = 0xFFA0, > > + .emu_mask = 0xFFBF, > > .init = xen_pt_devctrl2_reg_init, > > .u.w.read = xen_pt_word_reg_read, > > .u.w.write = xen_pt_word_reg_write, > > -- > > 2.34.1 >