On Tue, 11 Oct 2022 at 04:26, Richard Henderson <richard.hender...@linaro.org> wrote: > > We had been marking this ARM_MMU_IDX_NOTLB, move it to a real tlb. > Flush the tlb when invalidating stage 1+2 translations. Re-use > alle1_tlbmask() for other instances of EL1&0 + Stage2. > > Signed-off-by: Richard Henderson <richard.hender...@linaro.org> > --- > v4: Implement the IPAS2 and RIPAS2 tlb flushing insns; > Reuse alle1_tlbmask to fix aa32 and vttbr flushing. > ---
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org> thanks -- PMM
