The following changes since commit 4208e6ae114ac8266dcacc9696a443ce5c37b04e:
Merge tag 'pull-request-2022-12-15' of https://gitlab.com/thuth/qemu into staging (2022-12-15 21:39:56 +0000) are available in the Git repository at: https://github.com/quic/qemu tags/pull-hex-20221216-1 for you to fetch changes up to 585a86b1041a45c3b4074440c7f1b54944570867: target/hexagon: import additional tests (2022-12-16 12:30:28 -0800) ---------------------------------------------------------------- ****************************************************************** ***** WARNING ***** ***** This PR requires updated CI containers with flex/bison ***** ****************************************************************** 1) Performance improvement Add pkt and insn to DisasContext Many functions need information from all 3 structures, so merge them together. 2) Bug fix Fix predicated assignment to .tmp and .cur 3) Performance improvement Add overrides for S2_asr_r_r_sat/S2_asl_r_r_sat These functions will not be handled by idef-parser 4-11) The final 8 patches improve change-of-flow handling. Currently, we set the PC to a new address before exiting a TB. The ultimate goal is to use direct block chaining. However, several steps are needed along the way. 4) When a packet has more than one change-of-flow (COF) instruction, only the first one taken is considered. The runtime bookkeeping is only needed when there is more than one COF instruction in a packet. 5, 6) Remove PC and next_PC from the runtime state and always use a translation-time constant. Note that next_PC is used by call instructions to set LR and by conditional COF instructions to set the fall-through address. 7, 8, 9) Add helper overrides for COF instructions. In particular, we must distinguish those that use a PC-relative address for the destination. These are candidates for direct block chaining later. 10) Use direct block chaining for packets that have a single PC-relative COF instruction. Instead of generating the code while processing the instruction, we record the effect in DisasContext and generate the code during gen_end_tb. 11) Use direct block chaining for tight loops. We look for TBs that end with an endloop0 that will branch back to the TB start address. 12-21) Instruction definition parser (idef-parser) from rev.ng Parses the instruction semantics and generates TCG ---------------------------------------------------------------- Alessandro Di Federico (4): target/hexagon: update MAINTAINERS for idef-parser target/hexagon: import README for idef-parser target/hexagon: prepare input for the idef-parser target/hexagon: call idef-parser functions Anton Johansson (1): target/hexagon: import parser for idef-parser Niccolò Izzo (2): target/hexagon: introduce new helper functions target/hexagon: import additional tests Paolo Montesel (3): target/hexagon: make slot number an unsigned target/hexagon: make helper functions non-static target/hexagon: import lexer for idef-parser Taylor Simpson (11): Hexagon (target/hexagon) Add pkt and insn to DisasContext Hexagon (target/hexagon) Fix predicated assignment to .tmp and .cur Hexagon (target/hexagon) Add overrides for S2_asr_r_r_sat/S2_asl_r_r_sat Hexagon (target/hexagon) Only use branch_taken when packet has multi cof Hexagon (target/hexagon) Remove PC from the runtime state Hexagon (target/hexagon) Remove next_PC from runtime state Hexagon (target/hexagon) Add overrides for direct call instructions Hexagon (target/hexagon) Add overrides for compound compare and jump Hexagon (target/hexagon) Add overrides for various forms of jump Hexagon (target/hexagon) Use direct block chaining for direct jump/branch Hexagon (target/hexagon) Use direct block chaining for tight loops target/hexagon/idef-parser/README.rst | 722 ++++++++ target/hexagon/cpu.h | 14 +- target/hexagon/gen_tcg.h | 412 ++++- target/hexagon/gen_tcg_hvx.h | 6 +- target/hexagon/genptr.h | 36 + target/hexagon/idef-parser/idef-parser.h | 253 +++ target/hexagon/idef-parser/parser-helpers.h | 376 +++++ target/hexagon/insn.h | 9 +- target/hexagon/macros.h | 27 +- target/hexagon/mmvec/macros.h | 4 +- target/hexagon/op_helper.h | 37 + target/hexagon/translate.h | 20 +- target/hexagon/decode.c | 15 +- target/hexagon/genptr.c | 585 ++++++- target/hexagon/idef-parser/parser-helpers.c | 2360 +++++++++++++++++++++++++++ target/hexagon/op_helper.c | 55 +- target/hexagon/translate.c | 229 ++- tests/tcg/hexagon/hvx_misc.c | 72 + tests/tcg/hexagon/usr.c | 34 +- MAINTAINERS | 9 + meson_options.txt | 3 + target/hexagon/README | 5 + target/hexagon/gen_helper_funcs.py | 30 +- target/hexagon/gen_helper_protos.py | 31 +- target/hexagon/gen_idef_parser_funcs.py | 130 ++ target/hexagon/gen_tcg_funcs.py | 79 +- target/hexagon/hex_common.py | 40 +- target/hexagon/idef-parser/idef-parser.lex | 471 ++++++ target/hexagon/idef-parser/idef-parser.y | 965 +++++++++++ target/hexagon/idef-parser/macros.inc | 140 ++ target/hexagon/idef-parser/prepare | 24 + target/hexagon/meson.build | 158 +- tests/tcg/hexagon/Makefile.target | 28 +- tests/tcg/hexagon/crt.S | 14 + tests/tcg/hexagon/test_abs.S | 17 + tests/tcg/hexagon/test_bitcnt.S | 40 + tests/tcg/hexagon/test_bitsplit.S | 22 + tests/tcg/hexagon/test_call.S | 64 + tests/tcg/hexagon/test_clobber.S | 29 + tests/tcg/hexagon/test_cmp.S | 31 + tests/tcg/hexagon/test_dotnew.S | 38 + tests/tcg/hexagon/test_ext.S | 13 + tests/tcg/hexagon/test_fibonacci.S | 30 + tests/tcg/hexagon/test_hl.S | 16 + tests/tcg/hexagon/test_hwloops.S | 19 + tests/tcg/hexagon/test_jmp.S | 22 + tests/tcg/hexagon/test_lsr.S | 36 + tests/tcg/hexagon/test_mpyi.S | 17 + tests/tcg/hexagon/test_packet.S | 29 + tests/tcg/hexagon/test_reorder.S | 33 + tests/tcg/hexagon/test_round.S | 29 + tests/tcg/hexagon/test_vavgw.S | 31 + tests/tcg/hexagon/test_vcmpb.S | 30 + tests/tcg/hexagon/test_vcmpw.S | 30 + tests/tcg/hexagon/test_vlsrw.S | 20 + tests/tcg/hexagon/test_vmaxh.S | 35 + tests/tcg/hexagon/test_vminh.S | 35 + tests/tcg/hexagon/test_vpmpyh.S | 28 + tests/tcg/hexagon/test_vspliceb.S | 31 + 59 files changed, 7908 insertions(+), 210 deletions(-) create mode 100644 target/hexagon/idef-parser/README.rst create mode 100644 target/hexagon/idef-parser/idef-parser.h create mode 100644 target/hexagon/idef-parser/parser-helpers.h create mode 100644 target/hexagon/op_helper.h create mode 100644 target/hexagon/idef-parser/parser-helpers.c create mode 100644 target/hexagon/gen_idef_parser_funcs.py create mode 100644 target/hexagon/idef-parser/idef-parser.lex create mode 100644 target/hexagon/idef-parser/idef-parser.y create mode 100644 target/hexagon/idef-parser/macros.inc create mode 100755 target/hexagon/idef-parser/prepare create mode 100644 tests/tcg/hexagon/crt.S create mode 100644 tests/tcg/hexagon/test_abs.S create mode 100644 tests/tcg/hexagon/test_bitcnt.S create mode 100644 tests/tcg/hexagon/test_bitsplit.S create mode 100644 tests/tcg/hexagon/test_call.S create mode 100644 tests/tcg/hexagon/test_clobber.S create mode 100644 tests/tcg/hexagon/test_cmp.S create mode 100644 tests/tcg/hexagon/test_dotnew.S create mode 100644 tests/tcg/hexagon/test_ext.S create mode 100644 tests/tcg/hexagon/test_fibonacci.S create mode 100644 tests/tcg/hexagon/test_hl.S create mode 100644 tests/tcg/hexagon/test_hwloops.S create mode 100644 tests/tcg/hexagon/test_jmp.S create mode 100644 tests/tcg/hexagon/test_lsr.S create mode 100644 tests/tcg/hexagon/test_mpyi.S create mode 100644 tests/tcg/hexagon/test_packet.S create mode 100644 tests/tcg/hexagon/test_reorder.S create mode 100644 tests/tcg/hexagon/test_round.S create mode 100644 tests/tcg/hexagon/test_vavgw.S create mode 100644 tests/tcg/hexagon/test_vcmpb.S create mode 100644 tests/tcg/hexagon/test_vcmpw.S create mode 100644 tests/tcg/hexagon/test_vlsrw.S create mode 100644 tests/tcg/hexagon/test_vmaxh.S create mode 100644 tests/tcg/hexagon/test_vminh.S create mode 100644 tests/tcg/hexagon/test_vpmpyh.S create mode 100644 tests/tcg/hexagon/test_vspliceb.S
