On Tue, Dec 20, 2022 at 11:26:42PM +0000, Bernhard Beschow wrote: > > > Am 20. Dezember 2022 23:10:45 UTC schrieb "Michael S. Tsirkin" > <m...@redhat.com>: > >On Sun, Dec 18, 2022 at 10:21:49AM +0000, Bernhard Beschow wrote: > >> > >> > >> Am 9. Dezember 2022 15:23:59 UTC schrieb "Philippe Mathieu-Daudé" > >> <phi...@linaro.org>: > >> >On 20/11/22 16:05, Bernhard Beschow wrote: > >> >> v1: > >> >> === > >> >> > >> >> During my PIIX consolidation work [1] I've noticed that both PIIX > >> >> models have > >> >> quite different pci_slot_get_pirq() implementations. These functions > >> >> seem to > >> >> map PCI INTx pins to input pins of a programmable interrupt router > >> >> which is > >> >> AFAIU board-specific. IOW, board-specific assumptions are baked into > >> >> the device > >> >> models which prevent e.g. the whole PIIX4 south bridge to be reusable > >> >> in the PC > >> >> machine. > >> >> > >> >> This series first factors out pci_bus_map_irqs() from pci_bus_irqs() > >> >> which > >> >> then allowes for moving the two board-specific PIIX pci_slot_get_pirq() > >> >> funtions into their respective boards. With these changes, the PIIX4 > >> >> south > >> >> bridge could eventually become an alternative to the PIIX3-Frankenstein > >> >> solution in the PC machine. > >> > > >> >Series: > >> >Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org> > >> > >> Ping > >> > >> Who will pull this? > > > >To clarify, you want this dropped for now? > > Yeah, let's merge via mips-next since this series is related to the PIIX > consolidation series (see above) and mips-next is planned to be pulled soon. > > Thanks, > Bernhard
For that Acked-by: Michael S. Tsirkin <m...@redhat.com>